Pipeline (computing)

About: Pipeline (computing) is a research topic. Over the lifetime, 26760 publications have been published within this topic receiving 204305 citations. The topic is also known as: data pipeline & computational pipeline.

Fully pipelined DCT/IDCT/Hadamard unified transform architecture for HEVC Codec

Abstract: Great amount of two-dimensional (2D) discrete cosine transforms and Hadamard transforms are executed in HEVC. Upon the end of real-time UHDTV Codec, the full pipeline variable block size 2D transform engine with the efficient hardware utilization is proposed to handle the DCT/IDCT and Hadamard transforms. The efficiency comes from two aspects. First, the hardware for small-size transforms is fully reused by other larger-size transform processing. Second, we devise the unified architecture for IDCT and DCT through the algorithm optimization. The maximum clock speed of our design is 311MHz under 90nm technology. Experiments demonstrate that, at 47MHz clock frequency, one proposed engine provides the throughput for 8K-UHDTV real-time decoding, and it also fully supports the real-time encoding of HDTV1080p@20fps with 311MHz clock speed1.

Microprogrammed control system capable of pipelining even when executing a conditional branch instruction

Abstract: A microprogrammed control system capable of overlapping the fetch and execution of microinstructions even when a conditional jump microinstruction is being executed. The control system comprises a pipeline register for storing the microinstruction currently being executed. The system also includes address circuitry for forming an "ordinary address" which is one greater than the address of the microinstruction in the pipeline register and for forming at least one "jump address" of a microinstruction occurring elsewhere in the program. A conditional jump microinstruction identifies a jump address for the microinstruction to be executed next, which jump address is only valid after the condition identified by the conditional jump instruction is tested and indicates that the jump address is to be used. Otherwise, the next microinstruction has an ordinary address. Selection circuitry cooperates with at least one bit signal transmitted from the anticipated condition field in the conditional jump instruction to anticipate the result of testing the condition specified and selects an address from the address circuitry for transmission to the control store memory before testing of the specified condition is complete. The selection circuitry comprises correction circuitry which changes the selection of the address of the next microinstruction to be executed when the anticipated test result and the actual test result do not agree. When this occurs, the selection circuitry extends the cycle time of the control system to allow for correction.

Automated refinement of macromolecular structures at low resolution using prior information.

Abstract: Since the ratio of the number of observations to adjustable parameters is small at low resolution, it is necessary to use complementary information for the analysis of such data. ProSMART is a program that can generate restraints for macromolecules using homologous structures, as well as generic restraints for the stabilization of secondary structures. These restraints are used by REFMAC5 to stabilize the refinement of an atomic model. However, the optimal refinement protocol varies from case to case, and it is not always obvious how to select appropriate homologous structure(s), or other sources of prior information, for restraint generation. After running extensive tests on a large data set of low-resolution models, the best-performing refinement protocols and strategies for the selection of homologous structures have been identified. These strategies and protocols have been implemented in the Low-Resolution Structure Refinement (LORESTR) pipeline. The pipeline performs auto-detection of twinning and selects the optimal scaling method and solvent parameters. LORESTR can either use user-supplied homologous structures, or run an automated BLAST search and download homologues from the PDB. The pipeline executes multiple model-refinement instances using different parameters in order to find the best protocol. Tests show that the automated pipeline improves R factors, geometry and Ramachandran statistics for 94% of the low-resolution cases from the PDB included in the test set.

A novel hybrid motion estimator supporting diamond search and fast full search

Abstract: We present a novel hardware architecture supporting diamond search and fast full search for block matching motion estimation. It can handle irregular data flow of these fast algorithms without pipeline bubbles, and reduce computation of duplicated search positions. The proposed architecture needs preprocessing with a small amount of computational power while performing fast full search and is suitable for the platform-based video coding system. While the diamond search mode can be applied for real-time requirements, we can choose the fast full search mode, which adapts the processing cycles to picture contents and preserves the same quality of full search block matching (FSBM), for applications of high picture quality or compression ratio. It needs only 9K gates and one additional memory of search range size and is more cost-effective than the conventional systolic array architecture.