Pipeline (computing)

About: Pipeline (computing) is a research topic. Over the lifetime, 26760 publications have been published within this topic receiving 204305 citations. The topic is also known as: data pipeline & computational pipeline.

Architectural tradeoffs in the design of MIPS-X

Abstract: The design of a RISC processor requires a careful analysis of the tradeoffs that can be made between hardware complexity and software As new generations of processors are built to take advantage of more advanced technologies, new and different tradeoffs must be considered We examine the design of a second generation VLSI RISC processor, MIPS-XMIPS-X is the successor to the MIPS project at Stanford University and like MIPS, it is a single-chip 32-bit VLSI processor that uses a simplified instruction set, pipelining and a software code reorganizer However, in the quest for higher performance, MIPS-X uses a deeper pipeline, a much simpler instruction set and achieves the goal of single cycle execution using a 2-phase, 20 MHz clock This has necessitated the inclusion of an on-chip instruction cache and careful consideration of the control of the machine Many tradeoffs were made during the design of MIPS-X and this paper examines several key areas They are: the organization of the on-chip instruction cache, the coprocessor interface, branches and the resulting branch delay, and exception handling For each issue we present the most promising alternatives considered for MIPS-X and the approach finally selected Working parts have been received and this gives us a firm basis upon which to evaluate the success of our design

Signal analyzer system

Abstract: A signal analyzer system is disclosed which includes an arithmetic processor containing a plurality of pipeline processor elements in parallel array with each element connected to a respective working store, with all of the elements being under microprogram control of an arithmetic element controller. A storage controller included in the system is connected to the arithmetic processor, to a system input and to a system ouput. A bulk storage included in the system is connected to the storage controller. The storage controller controls data transfers into and out of the system and between the bulk storage and arithmetic processor. A control processor included in the system is connected to the arithmetic processor and the storage controller by means of a data bus for centrally controlling the operation of the plurality of pipeline processor elements by transmitting micro control words over the bus.

High-level algorithm and architecture transformations for DSP synthesis

Abstract: This survey paper reviews numerous high-level transformation techniques which can be applied at the algorithm or the architecture level to improve the performance of digital signal and image processing architectures and circuits implemented using VLSI technology. Successful design of VLSI signal and image processors requires careful selection of algorithms, architectures, implementation styles, and synthesis techniques. High-level transformations can play an important role in reducing silicon area or power at the same speed or in increasing the speed for same area. These transformations can also increase the suitability of an algorithm for a particular architectural style. The transformation techniques reviewed in this paper include pipelining, parallel processing, retiming, unfolding, folding, look-ahead, relaxed look-ahead, associativity, distributivity, and reduction in strength.

Real Field Deployment of a Smart Fiber-Optic Surveillance System for Pipeline Integrity Threat Detection: Architectural Issues and Blind Field Test Results

Abstract: This paper presents an online augmented surveillance system that aims at real-time monitoring of activities along a pipeline. The system is deployed in a fully realistic scenario and exposed to real activities carried out in unknown places at unknown times within a given test time interval (the so-called blind field tests). We describe the system architecture that includes specific modules to deal with the fact that continuous online monitoring needs to be carried out, while addressing the need of limiting the false alarms at reasonable rates. To the best of our knowledge, this is the first published work in which a pipeline integrity threat detection system is deployed in a realistic scenario (using a fiber optic along an active gas pipeline) and is thoroughly and objectively evaluated under realistic blind conditions. The system integrates two operation modes: the machine+activity identification mode identifies the machine that carries out a certain activity along the pipeline, and the threat detection mode directly identifies if the activity along the pipeline is a threat or not. The blind field tests are carried out in two different pipeline sections: the first section corresponds to the case in which the sensor is close to the sensed area, while the second one places the sensed area about $\text{35}$ km far from the sensor. Results of the machine+activity identification mode showed an average machine+activity classification rate of $\text{46.6}\%$ . For the threat detection mode, $\text{eight}$ out of $\text{ten}$ threats were correctly detected, with only $\text{one}$ false alarm appearing in a $\text{55.5}$ -h sensed period.

LazyBase: trading freshness for performance in a scalable database

Abstract: The LazyBase scalable database system is specialized for the growing class of data analysis applications that extract knowledge from large, rapidly changing data sets. It provides the scalability of popular NoSQL systems without the query-time complexity associated with their eventual consistency models, offering a clear consistency model and explicit per-query control over the trade-off between latency and result freshness. With an architecture designed around batching and pipelining of updates, LazyBase simultaneously ingests atomic batches of updates at a very high throughput and offers quick read queries to a stale-but-consistent version of the data. Although slightly stale results are sufficient for many analysis queries, fully up-to-date results can be obtained when necessary by also scanning updates still in the pipeline. Compared to the Cassandra NoSQL system, LazyBase provides 4X--5X faster update throughput and 4X faster read query throughput for range queries while remaining competitive for point queries. We demonstrate LazyBase's tradeoff between query latency and result freshness as well as the benefits of its consistency model. We also demonstrate specific cases where Cassandra's consistency model is weaker than LazyBase's.