Showing papers on "Polycrystalline silicon published in 2005"

Photographic surveying of minority carrier diffusion length in polycrystalline silicon solar cells by electroluminescence

Abstract: Photographic surveying of the minority carrier diffusion length distribution in polycrystalline silicon solar cells was proposed Light emission from the cell under the forward bias was captured by a charge coupled device camera We have found that the intensity distribution of light emission clearly agreed with the mapping of minority carrier diffusion length in polycrystalline silicon active layers The emission intensity had a one-to-one relationship with the minority carrier diffusion length, which yielded a semiquantitative analysis method of the diffusion length mapping and the detection of the deteriorated areas

Bidirectional photothyristor chip, optical lighting coupler, and solid state relay

Abstract: Two operation channels CH1 and CH2 of a bidirectional photothyristor chip 31 are disposed away from each other so as not to intersect with each other. In between a P-gate diffusion region 23 on the left-hand side and a P-gate diffusion region 23′ on the right-hand side on an N-type silicon substrate, and in between the CH1 and the CH2, a channel isolation region 29 comprised of an oxygen doped semi-insulating polycrystalline silicon film 35 a doped with phosphorus is formed. Consequently, a silicon interface state (Qss) in the vicinity of the channel isolation region 29 on the surface of the N-type silicon substrate increases, so that holes or minority carriers in the N-type silicon substrate are made to disappear in the region. This makes it possible to prevent such commutation failure that when a voltage of the inverted phase is applied to the CH2 side at the point of time when the CH1 is turned off, the CH2 is turned on without incidence of light, and this allows a commutation characteristic to be enhanced.

High-temperature degradation of NiSi films: Agglomeration versus NiSi2 nucleation

Abstract: The thermodynamical and morphological stability of NiSi thin films has been investigated for layers of thickness ranging from 10to60nm formed on either silicon-on-insulator (SOI), polycrystalline silicon, or preannealed polycrystalline silicon substrates. The stability of the films was evaluated using in situ x-ray-diffraction, sheet resistance, and laser light-scattering measurements. For NiSi films that are thinner than 20nm, agglomeration is the main degradation mechanism. For thicker films, the agglomeration of NiSi and nucleation of NiSi2 occur simultaneously, and both degradation mechanisms influence each other. Significant differences were observed in the degradation of the NiSi formed on different substrates. Surprisingly, agglomeration is worse on SOI substrates than on poly-Si substrates, suggesting that the texture of the NiSi film plays an important role in the agglomeration process. As expected, preannealing of the polycrystalline silicon substrate prior to metal deposition results in a signi...

Large open-circuit voltage improvement by rapid thermal annealing of evaporated solid-phase-crystallized thin-film silicon solar cells on glass

Abstract: In this letter, we investigate the impact of rapid thermal annealing (RTA) on thin-film polycrystalline silicon (pc-Si) solar cells on glass made by evaporation of amorphous silicon (a-Si) and subsequent solid-phase crystallization (SPC). These devices have the potential to deliver low-cost photovoltaic electricity and are named EVA cells (SPC of EVAporated a-Si). The RTA is used to perform a high-temperature (>700°C) process for point defect annealing and dopant activation. RTA processes have predominantly been developed for wafer-based devices yet also have great potential for low-temperature devices such as thin-film pc-Si on glass solar cells. Parameter variations are performed on EVA solar cells to determine optimum values for point defect removal and dopant activation while minimizing dopant diffusion causing junction smearing. The 1-Sun open-circuit voltage, Voc, of the as-crystallized pc-Si devices is rather modest (135mV). However, after RTA and subsequent hydrogen passivation in a rf PECVD plasm...

Thickness dependence of properties of excimer laser crystallized nano-polycrystalline silicon

Abstract: Excimer laser crystallization is used to produce layered nanocrystalline silicon from hydrogenated amorphous silicon, using a partial melting process. Three types of hydrogenated amorphous silicon samples, 100, 300, and 500 nm thick, were laser treated in order to investigate the changes to the structural, optical, and electrical properties as a function of amorphous silicon thickness with excimer laser crystallization. The resulting nanocrystalline thin films were characterized using Raman spectroscopy, optical absorption measurements, atomic force microscopy, forward recoil spectrometry, and current–voltage measurements. The relationship of crystalline volume and laser energy density was established, along with the behavior of the optical gap and its relationship to hydrogen content. Surface roughness effects are discussed in the context of photovoltaic applications. The effect of increased mobility on photoconductivity after excimer laser crystallization is also examined.

Vanadium pentoxide modified polycrystalline silicon anode for active-matrix organic light-emitting diodes

Abstract: Recently, polycrystalline silicon (p-Si) has been demonstrated to be an efficient anode for organic light-emitting diode (OLED) [X. L. Zhu, J. X. Sun, H. J. Peng, Z. G. Meng, M. Wong, and H. S. Kwok, Appl. Phys. Lett. 87, 083504 (2005)]. In this letter, we show that, by depositing an ultrathin vanadium pentoxide (V2O5) layer on the p-Si anode, the performance of the OLED can be greatly improved. Detailed x-ray photoelectron spectroscopy study shows that strong band bending occurs at the p-Si∕V2O5 interface, leading to much stronger hole injection. This modified p-Si anode can be integrated with the active p-Si layer of thin-film transistors in active-matrix OLED displays.

Study of low-temperature crystallization of amorphous Si films obtained using ferritin with Ni nanoparticles

Abstract: A polycrystalline silicon thin film with a high crystallinity was obtained using ferritin with a Ni core (7nm), which enabled us to precisely control the density and position of the nucleus for crystal growth. The core density of ferritin adsorbed on the amorphous silicon surface was controlled in the range from 109cm−2to1011cm−2. Crystal growth was performed at 550°C in N2. Crystallinity or grain size strongly depended on Ni core density. Polycrystalline silicon film with the average grain size of 3μm and a high crystallinity was obtained at a low Ni atom density of 1012cm−2.

Solid-state imaging device and method of manufacturing the same

Abstract: The invention reduces dark current of a solid-state imaging device A solid-state imaging device containing photodiode comprises: a diffusion layer placed side by side with the photodiode on the surface of an N-type semiconductor substrate; a first polycrystalline silicon electrode provided on the diffusion layer; a first Al interconnect provided on the first polycrystalline silicon electrode; a contact plug connecting the lower surface of the first Al interconnect and the first polycrystalline silicon electrode; and an adhesive film that is a titanium-containing film selectively provided within the contact plug

Anodic oxidation during MEMS processing of silicon and polysilicon: native oxides can be thicker than you think

Abstract: The thickness and surface roughness of the native oxide on undoped and P-doped single crystal silicon and polycrystalline silicon (polysilicon) were measured after exposure to aqueous hydrofluoric acid (HF) in the presence of localized metallization of sputtered Au or Pd. Both P-doping and the presence of metallization led to an increase in the thickness of the native surface oxide and an increased surface roughness after HF exposure. An external positive (negative) potential during HF immersion increased (decreased) the rate of what is clearly electrochemical i.e., anodic corrosion. The presence of the sputtered metallization promoted anodic corrosion, particularly in HF and particularly for P-doped silicon. Porous silicon can be formed under these conditions, due to dissolution of the anodically produced surface oxide. Subsequent oxidation of the porous silicon can lead to thick surface oxide layers.

Low-Temperature Fabrication of Polycrystalline Si Thin Film Using Al-Induced Crystallization without Native Al Oxide at Amorphous Si/Al Interface

Abstract: Low-temperature fabrication of polycrystalline silicon (poly-Si) thin film has been performed by Al-induced crystallization (AIC), and the structural properties have been investigated. In our experiments, to prevent native oxidation of Al film, an amorphous silicon (a-Si)/Al bilayer was formed on the SiO2/Si substrate by electron beam evaporation without breaking the vacuum. The a-Si/Al/SiO2/Si structure was then heated at a low temperature of 400°C to induce AIC. It was confirmed that layer exchange of the a-Si/Al bilayer is induced even though there is no native oxidation of Al film, which was demonstrated by scanning transmission electron microscopy and energy dispersive X-ray analysis. The mechanism for layer exchange of the a-Si/Al bilayer has been discussed. Furthermore, it was verified by scanning electron microscopy and spectroscopic ellipsometry that the a-Si/Al thickness ratio of roughly 1:1 is suitable to achieve a flat surface morphology of poly-Si. In addition, it was found, by X-ray diffraction and orientation imaging microscopy, that the Si(111)-oriented grain becomes dominant with decreasing thickness of the a-Si/Al bilayer.

A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors

Abstract: A new pixel circuit design for active matrix organic light-emitting diode (AMOLED), based on the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) is proposed and verified by SPICE simulation. Threshold voltage compensation pixel circuit consisting of four n-type TFTs, one p-type TFT, one additional control signal, and one storage capacitor is used to enhance display image quality. The simulation results show that this pixel circuit has high immunity to the variation of poly-Si TFT characteristics.

Fatigue failure in thin-film polycrystalline silicon is due to subcritical cracking within the oxide layer

Abstract: It has been established that microelectromechanical systems created from polycrystalline silicon thin films are subject to cyclic fatigue. Prior work by the authors has suggested that although bulk silicon is not susceptible to fatigue failure in ambient air, fatigue in micron-scale silicon is a result of a “reaction-layer” process, whereby high stresses induce a thickening of the post-release oxide at stress concentrations such as notches, which subsequently undergoing moisture-assisted cracking. However, there exists some controversy regarding the post-release oxide thickness of the samples used in the prior study. In this letter, we present data from devices from a more recent fabrication run that confirm our prior observations. Additionally, new data from tests in high vacuum show that these devices do not fatigue when oxidation and moisture are suppressed. Each of these observations lends credence to the “reaction-layer” mechanism.

Polycrystalline silicon thin-film solar cells on glass by aluminium-induced crystallisation and subsequent ion-assisted deposition (ALICIA)

Abstract: A research project is under way at The University of New South Wales aiming at the realisation of a novel type of polycrystalline silicon thin-film solar cell on glass. The idea is to first create a thin large-grained polycrystalline seed layer on glass by aluminium-induced crystallisation of amorphous silicon and then to epitaxially thicken the seed layer with ion-assisted deposition. By mid-2003 this ALICIA project had achieved laboratory cells with voltages of up to 163 mV, as reported elsewhere. In the present paper we give an overview of recent progress (improved Si epitaxy process, improved control of base doping profile due to the use of phosphorus dopants instead of gallium, hydrogen passivation) that has improved the voltages of ALICIA solar cells to 270 mV. Furthermore, the strategy for further voltage improvements is presented. At the present point in time only the voltages of ALICIA cells are known, but obviously solar cells also require current for good efficiency. Hence much improvement in both voltage and current is still needed. Copyright © 2004 John Wiley & Sons, Ltd.

Thermal characterization of liquids and polymer thin films using a microcalorimeter

Abstract: This paper presents an integrated microfluidic thermal sensor that can be used to characterize the thermal properties of nanoliter quantities of fluids and polymer thin films. The device consists of a polycrystalline silicon (polysilicon) heater located in close proximity to the hot junctions of p+-polysilicon/gold microthermopiles fabricated on a thermally isolated membrane. ac calorimetric measurements were performed by introducing a periodic heat signal using the heater and detecting the frequency-dependent thermal signal response in the presence of various fluids and polymers. The thermal conductivity of different fluids and five typical polymers used in microfabrication was measured using this device.

Semiconductor device with heterojunction

Abstract: An aspect of the present invention provides a semiconductor device that includes a semiconductor base (100,101,102) made of a first semiconductor material, eg. silicon carbide, of a first conductivity type, a hetero-semiconductor region (103) forming a heterojunction with the semiconductor base and made of a second semiconductor material, eg. polycrystalline silicon having a different band gap from the first semiconductor material, a first gate electrode (105) arranged in the vicinity of the heterojunction, a first gate insulating film (104) configured to insulate the first gate electrode from the semiconductor base, a source electrode (108) formed in contact with the hetero-semiconductor region, a drain electrode (109) formed in contact with the semiconductor base, and an electric field extending region (106) partly facing the first gate electrode, the first gate insulating film and hetero-semiconductor region interposed between the electric field extending region and the first gate electrode, the electric field extending region extending a built-in electric field into the hetero-semiconductor region.

Measurements of potential barrier height of grain boundaries in polycrystalline silicon by Kelvin probe force microscopy

Abstract: In recent years, the importance of polycrystalline silicon has been recognized in electronic device technology, although grain boundaries present in the material often exert a detrimental influence on the electrical properties because of the potential barriers associated with them. However, it is not true that all grain boundaries have similar properties, since they have their own character depending on the orientation relationship between two adjoining grains. We report here the first determination of the potential barrier height for well-characterized grain boundaries in polycrystalline silicon, using Kelvin probe force microscopy. The observed barrier height of the grain boundaries was found to vary in the range 10 to 100 meV depending on the grain boundary character. The most important finding is that the potential barrier height is approximately twice as high at random boundaries as at low-energy coincidence boundaries.

Polycrystalline silicon ion sensitive field effect transistors

Abstract: We report the operation of polycrystalline silicon ion sensitive field effect transistors. These devices can be fabricated on inexpensive disposable substrates such as glass or plastics and are, therefore, promising candidates for low cost single-use intelligent multisensors. In this work we have developed an extended gate structure with a Si3N4 sensing layer. Nearly ideal pH sensitivity (54mV∕pH) and stable operation have been achieved. Temperature effects have been characterized. A penicillin sensor has been fabricated by functionalizing the sensing area with penicillinase. The sensitivity to penicillin G is about 10mV∕mM, in solutions with concentration lower than the saturation value, which is about 7 mM.

Improvements of on-membrane method for thin film thermal conductivity and emissivity measurements

Abstract: A numerical simulation and various test-structure configurations were developed which enable the measurement of the in-plane thermal conductivity and emissivity of on-membrane thin films in a versatile and accurate manner. The simulation takes into account the two-dimensional heat transfer in the membrane. Consequently, shorter membrane can be used and strained materials can be measured. The numerical simulation along with the new test-structures is used to understand the convective heat transfer at small scales and to quantify it. The measurement method is tested on various materials ranging from ceramics, metals to polycrystalline silicon.

Fermi level pinning and Hf–Si bonds at HfO2: Polycrystalline silicon gate electrode interfaces

Abstract: Doped polycrystalline Si (poly-Si) gate electrodes on HfO2 films on Si substrates are found not to cause as large shifts in the flat band voltage as those of SiO2 on Si. This effect has been attributed to a weak pinning of the Fermi level at the top poly-Si HfO2 interface. The effect is shown to be consistent with the formation of Hf–Si bonds at an otherwise O-terminated oxide interface. Vacancies, divacancies, and substitutional Si atoms are introduced into models of oxygen-terminated Si–HfO2 (100) interfaces and the resulting Hf–Si bonds are found to create a metallic interface with the Fermi level pinned at about 0.3 eV below the Si conduction band-edge.

Semiconductor laser crystallization of a-Si:H on conducting tin-oxide-coated glass for solar cell and display applications

Abstract: Semiconductor laser (λ=805 nm) crystallization of hydrogenated amorphous silicon (a-Si:H) deposited on a low-cost fluoride-doped tin-oxide-coated glass substrate is demonstrated. X-ray diffraction confirms that the structure of the polycrystalline silicon thus formed shows (111), (220), and (311) peaks. A sharp Raman peak at 520 cm-1 further confirms the crystallization. Atomic force microscope images of a Secco-etched laser-treated sample reveal the granular structure of the poly-Si. Grains as big as ∼10 times the film thickness are readily obtained and sample as thick as 5000 A is easily crystallized. The method can be extended to films with a thickness of several microns.

Large grained polycrystalline silicon and method of making same

Abstract: A silicon structure includes a selective nucleating single phase epitaxial (SNSPE) template polysilicon layer containing crystallization catalyst residue, and a hot wire chemical vapor deposited (HWCVD) epitaxial polysilicon layer epitaxially grown on said template layer. The silicon structure may satisfy at least one of the following: 1) a thickness of the SNSPE template layer is less that about 60 nm; 2) a thickness of the HPCVD layer is greater than about 60 nm. The silicon structure may be used in a polysilicon solar cell or other solid state devices. A method of making a polysilicon layer includes providing a first layer comprising an amorphous silicon or a polysilicon layer containing a crystallization catalyst or in contact with a crystallization catalyst, and annealing the first layer in a silicon containing atmosphere to at least partially crystallize the first layer.

Experimental study of aluminum-induced crystallization of amorphous silicon thin films

Abstract: This work was an experimental study of the aluminum-induced crystallization (AIC) of amorphous silicon (a-Si) for the fabrication of polycrystalline silicon film. The a-Si film was deposited on silicon wafer by low pressure chemical vapor deposition (LPCVD) technique. Aluminum was sputtered on to the a-Si film at different thicknesses. The samples were annealed for 3 h at different temperatures from 250 to 550 °C. The annealed silicon films were analyzed with emphasis on their crystallinity and morphology. Results showed that in the presence of aluminum, a-Si film started crystallization at a temperature as low as 250 °C. However, high crystallization rate would be achieved only when the annealing was done at temperatures higher than 350 °C. For practical applications, this temperature might well be the lower limit in AIC method for crystallization of silicon. The thickness of aluminum film was found to play a critical role that dictated the extent of crystallization and the preferred orientation of the resulting polycrystalline thin film.

Method for making a semiconductor structure using silicon germanium

Abstract: A semiconductor substrate having a silicon layer (24,26,28) is provided. In one embodiment, the substrate is a silicon-on-insulator (SOI) substrate (12,14,24,26,28) having an oxide layer (14) underlying the silicon layer (24,26,28). An amorphous or polycrystalline silicon germanium layer (32) is formed overlying the silicon layer (24,26,28). Alternatively, germanium is implanted into a top portion of the silicon layer (24,26,28) to form an amorphous silicon germanium layer (32). The silicon germanium layer (32) is then oxidized to convert the silicon germanium layer into a silicon dioxide layer (34) and to convert at least a portion of the silicon layer (24,26,28) into germanium-rich silicon (36,38). The silicon dioxide layer (34) is then removed prior to forming transistors (48,50,52) using the germanium-rich silicon (36,38). In one embodiment, the germanium-rich silicon (36,38) is selectively formed using a patterned masking layer (30) over the silicon layer (28) and under the silicon germanium layer (32). Alternatively, isolation regions may be used to define local regions of the substrate in which the germanium-rich silicon is formed.

Laser irradiation apparatus, laser irradiation method, semiconductor device, and method of manufacturing a semiconductor device

Abstract: To form a polycrystalline silicon film having a grain size of 1 μm or greater by means of laser annealing. A beam emitted from a laser apparatus ( 101 ) is split in two by a half mirror. The split beams are processed into linear shapes by cylindrical lenses ( 102 ) to ( 105 ), and ( 207 ), then simultaneously irradiate an irradiation surface ( 209 ). If an amorphous silicon film formed on a glass substrate is disposed on the irradiation surface ( 209 ), an area will be irradiated by both a linear shape beam entering from a front surface and a linear shape beam that has transmitted through the glass surface. Both linear shape beams irradiate the same area to thereby crystallize the amorphous silicon film.