Showing papers on "Polycrystalline silicon published in 2007"

Assembly and characterization of colloid-based antireflective coatings on multicrystalline silicon solar cells

Abstract: Evaporation from a moving meniscus was used for controlled convective assembly of colloidal silica nanoparticles into antireflective coatings (ARCs) onto the rough uneven surfaces of polycrystalline silicon solar cells. The nanocoatings reduced the reflectance of the solar cells by approximately 10% across the near UV to near IR spectral range, which provided a 17% increase in the output power of the devices (which translated to a 10% relative increase in the efficiency). Microstructural analysis via SEM showed that while the surface coverage was uniform over long ranges, the thickness of the particle coatings varied locally due to the rough, undulating substrate surface. The UV/vis reflectance data of the silica coated solar cells could be modelled with the Fresnel reflectance relation by assuming a distributed range of thicknesses for the coatings, in good agreement with the microstructural data. We show that particulate films deposited on rough surfaces can function as ARCs even though they do not attain 0% reflectance. These silica particle-based coatings can be further modified by attachment of monolayers of fluorosilanes, which may make them superhydrophobic and/or self-cleaning.

Enhancement of polycrystalline silicon solar cells using ultrathin films of silicon nanoparticle

Abstract: Ultrathin films of highly monodispersed luminescent Si nanoparticles are directly integrated on polycrystalline Si solar cells. The authors monitor the open-circuit voltage and the short circuit current. The results demonstrate that films of 1 nm blue luminescent or 2.85 nm red luminescent Si nanoparticles produce large voltage enhancements with improved power performance of 60% in the UV/blue range. In the visible, the enhancements are ∼ 10 % for the red and ∼ 3 % for the blue particles. The results point to a significant role for charge resonant transport across the nanofilm and Schottky-like rectification at nanoparticle-metal interface.

Mechanisms for Fatigue of Micron-Scale Silicon Structural Films†

Abstract: Although bulk silicon is not susceptible to fatigue, micron-scale silicon is. Several mechanisms have been proposed to explain this surprising behavior although the issue remains contentious. Here we review published fatigue results for micron-scale thin silicon films and find that in general they display similar trends, in that lower cyclic stresses result in larger number of cycles to failure in stress-lifetime data. We further show that one of two classes of mechanisms is invariably proposed to explain the phenomenon. The first class attributes fatigue to a surface effect caused by subcritical (stable) cracking in the silicon-oxide layer, e.g., reaction-layer fatigue; the second class proposes that subcritical cracking in the silicon itself is the cause of fatigue in Si films. It is our contention that results to date from single and polycrystalline silicon fatigue studies provide no convincing experimental evidence to support subcritical cracking in the silicon. Conversely, the reaction-layer mechanism is consistent with existing experimental results, and moreover provides a rational explanation for the marked difference between the fatigue behavior of bulk and micron-scale silicon.

Polysilicon photonic resonators for large-scale 3D integration of optical networks.

Abstract: We demonstrate optical microresonators in polycrystalline silicon with quality factors of 20,000. We also demonstrate polycrystalline resonators vertically coupled to crystalline silicon waveguides. Electrically active photonic structures fabricated in deposited polysilicon layers would enable the large-scale integration of photonics with current CMOS microelectronics.

Elastic Properties and Representative Volume Element of Polycrystalline Silicon for MEMS

Abstract: A nanoscale mechanical deformation measurement method was employed to obtain the Young’s modulus and Poisson’s ratio of polycrystalline silicon for Microelectromechanical Systems (MEMS) from different facilities, and to assess the scale at which these effective properties are valid in MEMS design. The method, based on in situ Atomic Force Microscope (AFM) imaging and Digital Image Correlation (DIC) analysis, employed 2–2.5 μm thick freestanding specimens with surface measurement areas varying between 1×2 and 5×15 μm2. The effective mechanical properties were quite invariant with respect to the fabrication facility: the Poisson’s ratio of polycrystalline silicon from the Multi-user MEMS Processes (MUMPs) and from Sandia’s Ultra planar four layer Multilevel MEMS Technology (SUMMiT-IV) was 0.22±0.02, while the elastic moduli for MUMPs and SUMMiT-IV polysilicon were 164±7 and 155±6 GPa, respectively. The AFM/DIC method was used to determine the size of the material domain whose mechanical behavior could be described by the isotropic constants. For SUMMiT polysilicon with columnar grains and 650 nm average grain size, it was found that a 10×10-μm2 specimen area, on average containing 15×15 columnar grains, was a representative volume element. However, the axial displacement fields in 4×4 or 2×2 μm2 areas could be highly inhomogeneous and the effective behavior of these specimen domains could deviate significantly from that described by isotropy. As a consequence, the isotropic material constants are applicable to MEMS components comprised of 15×15 or more grains, corresponding to specimen areas equal to 10×10 μm2 for SUMMiT and 5×5 μm2 for MUMPs, and do not provide an accurate description of the mechanics of smaller MEMS components.

Solid phase epitaxy versus random nucleation and growth in sub-20nm wide fin field-effect transistors

Abstract: The authors investigate the implications of amorphizing ion implants on the crystalline integrity of sub-20nm wide fin field-effect transistors (FinFETs). Recrystallization of thin body silicon is not as straightforward as that of bulk silicon because the regrowth direction may be parallel to the silicon surface rather than terminating at it. In sub-20nm wide FinFETs surface proximity suppresses crystal regrowth and promotes the formation of twin boundary defects in the implanted regions. In the case of a 50nm amorphization depth, random nucleation and growth leads to polycrystalline silicon formation in the top ∼25nm of the fin, despite being only ∼25nm from the crystalline silicon seed.

Synthesis of silicon nanocrystals in silane plasmas for nanoelectronics and large area electronic devices

Abstract: The synthesis of silicon nanocrystals in standard radio-frequency glow discharge systems is studied with respect to two main objectives: (i) the production of devices based on quantum size effects associated with the small dimensions of silicon nanocrystals and (ii) the synthesis of polymorphous and polycrystalline silicon films in which silicon nanocrystals are the elementary building blocks. In particular we discuss results on the mechanisms of nanocrystal formation and their transport towards the substrate. We found that silicon nanocrystals can contribute to a significant fraction of deposition (50–70%) and that they can be positively charged. This has a strong influence on their deposition because positively charged nanocrystals will be accelerated towards the substrate with energy of the order of the plasma potential. However, the important parameter with respect to the deposition of charged nanocrystals is not the accelerating voltage but the energy per atom and thus a doubling of the diameter will result in a decrease in the energy per atom by a factor of 8. To leverage this geometrical advantage we propose the use of more electronegative gases, which may have a strong effect on the size and charge distribution of the nanocrystals. This is illustrated in the case of deposition from silicon tetrafluoride plasmas in which we observe low-frequency plasma fluctuations, associated with successive generations of nanocrystals. The contribution of larger nanocrystals to deposition results in a lower energy per deposited atom and thus polycrystalline films.

Polycrystalline Silicon Thin-Film Solar Cells on AIT-Textured Glass Superstrates

Abstract: A new glass texturing method (AIT—aluminium-induced texturisation) has recently been developed by our group. In the present work, the potential of this method is explored by fabricating PLASMA poly-Si thin-film solar cells on glass superstrates that were textured with the AIT method. Using an interdigitated metallisation scheme with a full-area Al rear contact, PLASMA cells with an efficiency of up to 7% are realised. This promising result shows that the AIT glass texturing method is fully compatible with the fabrication of poly-Si thin-film solar cells on glass using solid phase crystallisation (SPC) of PECVD-deposited amorphous silicon precursor diodes. As such, there are now two distinctly different glass texturing methods—the AIT method and CSG Solar's glass bead method—that are known to be capable of producing efficient SPC poly-Si thin-film solar cells on glass.

Surface treatment method and solar cell

Abstract: PROBLEM TO BE SOLVED: To form an irregular shape satisfactory for a solar cell on the surface of a polycrystalline silicon substrate. SOLUTION: In a surface treatment method, the surface of the polycrystalline silicon substrate 2 is treated. In the surface treatment method, the polycrystalline silicon substrate 2 is arranged between a stage electrode 3 provided in a reaction vessel 1, and an earthed electrode 4. Then, the surface treatment method has a process for introducing etching gas containing ClF 3 into the reaction vessel 1, and applying high-frequency power between the stage electrode 3 and the earthed electrode intermittently. COPYRIGHT: (C)2008,JPO&INPIT

Large Polycrystalline Silicon Grains Prepared by Excimer Laser Crystallization of Sputtered Amorphous Silicon Film with Process Temperature at 100 °C

Abstract: Large polycrystalline silicon (poly-Si) grains with a diameter of 1.8 µm are successfully prepared by excimer laser crystallization (ELC) of a sputtered amorphous silicon (α-Si) film at a maximum process temperature of 100 °C. By pulsed DC magnetron sputtering, α-Si is deposited on a non-structured oxidized wafer. It is found that the α-Si film deposited with a bias is easily ablated during ELC, even at an energy density below the super lateral growth (SLG) region. However, the α-Si film deposited without a bias can endure an energy density well beyond the SLG region without ablation. This zero-bias sputtered α-Si film with a high compressive stress has a low Ar content and a high density, which is beneficial for the suppression of ablation. Large grains with a petal-like shape can be obtained in a wide energy density window, which can be a result from some fine crystallites in the α-Si matrix. These large grains with a low process temperature are promising for the direct formation of system circuits as well as a high-quality display on a plastic foil.

Assembled Semiconductor Nanowire Thin Films for High-Performance Flexible Macroelectronics

Abstract: A new concept of macroelectronics using assembled semiconductor nanowire thin films holds the promise of significant performance improvement. In this new concept, a thin film of oriented semiconductor nanowires is used to produce thin-film transistors (TFTs) with conducting channels formed by multiple parallel single-crystal nanowire paths. There fore, charges travel from source to drain within single crystals, ensuring high carrier mobility. Recent studies have shown that high-performance silicon nanowire TFTs and high-frequency circuits can be readily produced on a variety of substrates including glass and plastics using a solution assembly process. The device performance of these nanowire TFTs not only greatly surpasses that of solution-processed organic TFTs, but is also significantly better than that of conventional amorphous or polycrystalline silicon TFTs, approaching single-crystal silicon-based devices. Furthermore, with a similar frame-work, Group III-V or II-VI nanowire or nanoribbon materials of high intrinsic carrier mobility or optical functionality can be assembled into thin films on flexible substrates to enable new multifunctional electronics/optoelectronics that are not possible with traditional macroelectronics. This can have an impact on a broad range of existing applications, from flat-panel displays to image sensor arrays, and enable a new generation of flexible, wearable, or disposable electronics for computing, storage, and wireless communication.

Method of fabricating thin film transistor

Abstract: Disclosed is a method of fabricating a thin film transistor in which, in order to control the concentration of metal catalysts remaining on a polycrystalline silicon layer when an amorphous silicon layer formed on an insulating substrate is crystallized into the polycrystalline silicon layer by a super grain silicon (SGS) crystallization method, the substrate is annealed so that a very small amount of metal catalyst is adsorbed or diffused into a capping layer, and then a crystallization process is carried out, thereby minimizing the concentration of the metal catalysts remaining on the polycrystalline silicon layer, as well as forming a thick metal catalyst layer. The method includes preparing an insulating substrate; sequentially forming an amorphous silicon layer, a capping layer, and a metal catalyst layer on the substrate; first annealing the substrate to adsorb or diffuse metal catalysts into the capping layer; removing the metal catalyst layer; second annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer by means of the metal catalyst; and removing the capping layer. Thus, with the method of fabricating the thin film transistor of the present invention, it is possible to minimize the concentration of the metal catalysts remaining on the polycrystalline silicon layer, as well as to form a thick metal catalyst layer.

Very high-cycle fatigue failure in micron-scale polycrystalline silicon films : Effects of environment and surface oxide thickness

Abstract: Fatigue failure in micron-scale polycrystalline silicon structural films, a phenomenon that is not observed in bulk silicon, can severely impact the durability and reliability of microelectromechanical system devices. Despite several studies on the very high-cycle fatigue behavior of these films (up to 1012cycles), there is still an on-going debate on the precise mechanisms involved. We show here that for devices fabricated in the multiuser microelectromechanical system process (MUMPs) foundry and Sandia Ultra-planar, Multi-level MEMS Technology (SUMMiT V™) process and tested under equi-tension/compression loading at ∼40kHz in different environments, stress-lifetime data exhibit similar trends in fatigue behavior in ambient room air, shorter lifetimes in higher relative humidity environments, and no fatigue failure at all in high vacuum. The transmission electron microscopy of the surface oxides in the test samples shows a four- to sixfold thickening of the surface oxide at stress concentrations after fatigue failure, but no thickening after overload fracture in air or after fatigue cycling in vacuo. We find that such oxide thickening and premature fatigue failure (in air) occur in devices with initial oxide thicknesses of ∼4nm (SUMMiT V™) as well as in devices with much thicker initial oxides ∼20nm (MUMPs). Such results are interpreted and explained by a reaction-layer fatigue mechanism. Specifically, moisture-assisted subcritical cracking within a cyclic stress-assisted thickened oxide layer occurs until the crack reaches a critical size to cause catastrophic failure of the entire device. The entirety of the evidence presented here strongly indicates that the reaction-layer fatigue mechanism is the governing mechanism for fatigue failure in micron-scale polycrystalline silicon thin films.

Amorphous Silicon, Microcrystalline Silicon, and Thin-Film Polycrystalline Silicon Solar Cells

Abstract: Thin-film solar cell technologies based on Si with a thickness of less than a few micrometers combine the low-cost potential of thin-film technologies with the advantages of Si as an abundantly available element in the earth's crust and a readily manufacturable material for photovoltaics (PVs). In recent years, several technologies have been developed that promise to take the performance of thin-film silicon PVs well beyond that of the currently established amorphous Si PV technology. Thin-film silicon, like no other thin-film material, is very effective in tandem and triple-junction solar cells. The research and development on thin crystalline silicon on foreign substrates can be divided into two different routes: a low-temperature route compatible with standard float glass or even plastic substrates, and a high-temperature route ( >600°C). This article reviews the material properties and technological challenges of the different thin-film silicon PV materials.

Chemical and biological sensors using polycrystalline silicon TFTs

Abstract: Over the past three decades effort has been devoted to exploit the field-effect mechanism in chemical and biological sensors, due to the potential of these devices to provide large arrays of sensors that are label-free, low-cost, disposable and can be easily integrated in portable instrumentation. Most of this work concerned the development of ion-sensitive field-effect transistors. More recently, field-effect devices have been investigated for the detection of DNA hybridization and protein interactions. Of particular interest is the use of polycrystalline silicon thin film transistors. This technology is inherently low cost and yet capable of providing complex single-use microarrays.

Electrical activity of intragrain defects in polycrystalline silicon layers obtained by aluminum-induced crystallization and epitaxy

Abstract: Defect etching revealed a very large density (∼109cm−2) of intragrain defects in polycrystalline silicon (pc-Si) layers obtained through aluminum-induced crystallization of amorphous Si and epitaxy. Electron-beam-induced current measurements showed a strong recombination activity at these defects. Cathodoluminescence measurements showed the presence of two deep-level radiative transitions (0.85 and 0.93eV) with a relative intensity varying from grain to grain. These results indicate that the unexpected quasi-independence on the grain size of the open-circuit voltage of these pc-Si solar cells is due to the presence of numerous electrically active intragrain defects.

Silicon production with a fluidized bed reactor integrated into a siemens-type process

Abstract: A fluidized bed reactor and a Siemens reactor are used to produce polycrystalline silicon. The process includes feeding the vent gas from the Siemens reactor as a feed gas to the fluidized bed reactor.

Method for continual preparation of polycrystalline silicon using a fluidized bed reactor

Abstract: There is provided a method for continual preparation of granular polycrystalline silicon using a fluidized bed reactor, enabling a stable, long-term operation of the reactor by effective removal of silicon deposit accumulated on the inner wall of the reactor tube. The method comprises (i) a silicon particle preparation step, wherein silicon deposition occurs on the surface of the silicon particles, while silicon deposit is accumulated on the inner wall of the reactor tube encompassing the reaction zone; (ii) a silicon particle partial discharging step, wherein a part of the silicon particles remaining inside the reactor tube is discharged out of the fluidized bed reactor so that the height of the bed of the silicon particles does not exceed the height of the reaction gas outlet; and (iii) a silicon deposit removal step, wherein the silicon deposit is removed by supplying an etching gas into the reaction zone.

Temperature stability of ZnO:Al film properties for poly-Si thin-film devices

Abstract: The crystallization of thin silicon films at temperatures between 425 and 600°C was investigated on glass substrates coated with Al-doped zinc oxide (ZnO:Al). Bare ZnO:Al layers degrade at the crystallization temperatures used. A silicon layer on top, however, efficiently prevents deterioration. The resistivity was even found to drop from 4.3×10−4Ωcm for the as deposited ZnO:Al to 2.2×10−4Ωcm in the case of aluminium induced crystallization and to 3.4×10−4Ωcm for solid phase crystallization. The temperature-stable conductivity of ZnO:Al films coated with Si opens up appealing options for the production of polycrystalline silicon thin-film solar cells with transparent front contacts.

Formation of Highly Uniform Micrometer-Order-Thick Polycrystalline Silicon Films by Flash Lamp Annealing of Amorphous Silicon on Glass Substrates

Abstract: Polycrystalline silicon (poly-Si) films as thick as 4.5 µm are prepared by flash lamp annealing (FLA) of amorphous silicon (a-Si) films without thermal damage onto glass substrates. The a-Si films are deposited by catalytic chemical vapor deposition (Cat-CVD) at 320 °C. Since the hydrogen content in Cat-CVD a-Si films is as low as 3 at. %, they are easily converted to poly-Si without any dehydrogenation treatment. Chromium (Cr) films 60 nm thick are coated onto glass substrates to achieve high area uniformity of poly-Si formation. Secondary ion mass spectroscopy (SIMS) reveals that no diffused Cr atoms are detected inside poly-Si films and that crystallization is not the well-known metal-induced crystallization. Raman spectra from the poly-Si films show high crystallinity close to 1, and the photoluminescence (PL) spectrum demonstrates clear band-to-band transition, indicating the formation of device-quality poly-Si by FLA of Cat-CVD a-Si.

Homogeneous nanocrystalline cubic silicon carbide films prepared by inductively coupled plasma chemical vapor deposition

Abstract: Silicon carbide films with different carbon concentrations xC have been synthesized by inductively coupled plasma chemical vapor deposition from a SiH4/CH4/H2 gas mixture at a low substrate temperature of 500 °C. The characteristics of the films were studied by x-ray photoelectron spectroscopy, x-ray diffraction, scanning electron microscopy, high-resolution transmission electron microscopy, Fourier transform infrared absorption spectroscopy, and Raman spectroscopy. Our experimental results show that, at xC = 49 at.%, the film is made up of homogeneous nanocrystalline cubic silicon carbide without any phase of silicon, graphite, or diamond crystallites/clusters. The average size of SiC crystallites is approximately 6 nm. At a lower value of xC, polycrystalline silicon and amorphous silicon carbide coexist in the films. At a higher value of xC, amorphous carbon and silicon carbide coexist in the films.

Surface Passivation of Crystalline and Polycrystalline Silicon Using Hydrogenated Amorphous Silicon Oxide Film

Abstract: Excellent passivation properties of hydrogenated amorphous silicon oxide (a-SiOx:H) prepared by very high frequency plasma-enhanced chemical vapor deposition (VHF PECVD) at a low substrate temperature (170 °C) on crystalline and polycrystalline silicon (Si) wafers are reported. Films were characterized by ellipsometry, Fourier transform infrared spectroscopy (FTIR), ultraviolet–visible (UV–vis) spectrophotometry, and dark-conductivity and photoconductivity measurements. A comparison of the results with those for different passivation layers such as hydrogenated amorphous silicon carbon nitride (a-SiCxNy:H), hydrogenated amorphous silicon nitride (a-SiNx:H), and hydrogenated amorphous silicon (a-Si:H) reveals their superiority as an excellent passivation layer for p-type crystalline Si as well as polycrystalline Si. A maximum effective lifetime of 400 µs was measured for 1–10 Ω cm, 380-µm-thick p-type c-Si using a micro-photocurrent decay (µ-PCD) system. Fixed charge density (Qf) was estimated by high-frequency (1 MHz) capacitance–voltage measurement using a metal–insulator–silicon structure (CV-MIS). The effect of annealing temperature on surface passivation in a nitrogen atmosphere was also studied.

High-pressure fluidized bed reactor for preparing granular polycrystalline silicon

Abstract: The present invention relates to a high-pressure fluidized bed reactor for preparing granular polycrystalline silicon, comprising (a) a reactor tube, (b) a reactor shell encompassing the reactor tube, (c) an inner zone formed within the reactor tube, where a silicon particle bed is formed and silicon deposition occurs, and an outer zone formed in between the reactor shell and the reactor tube, which is maintained under the inert gas atmosphere, and (d) a controlling means to keep the difference between pressures in the inner zone and the outer zone being maintained within the range of 0 to 1 bar, thereby enabling to maintain physical stability of the reactor tube and efficiently prepare granular polycrystalline silicon even at relatively high reaction pressure.

Degradation Behaviors of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors Under DC Bias Stresses

Abstract: Device degradation behaviors of typical-sized n-type metal-induced laterally crystallized polycrystalline silicon thin-film transistors were investigated in detail under two kinds of dc bias stresses: hot-carrier (HC) stress and self-heating (SH) stress Under HC stress, device degradation is the consequence of HC induced defect generation locally at the drain side Under a unified model that postulates, the establishment of a potential barrier at the drain side due to carrier transport near trap states, device degradation behavior such as asymmetric on current recovery and threshold voltage degradation can be understood Under SH stress, a general degradation in subthreshold characteristic was observed Device degradation is the consequence of deep state generation along the entire channel Device degradation behaviors were compared in low Vd-stress and in high Vd-stress condition Defect generation distribution along the channel appears to be different in two cases In both cases of SH degradation, asymmetric on current recovery was observed This observation, when in low Vd-stress condition, is tentatively explained by dehydrogenation (hydrogenation) effect at the drain (source) side during stress

Electrical and Raman characterization of silicon and germanium-filled microstructured optical fibers

Abstract: Extreme aspect ratio tubes and wires of polycrystalline silicon and germanium have been deposited within silica microstructured optical fibers using high-pressure precursors, demonstrating the potential of a platform technology for the development of in-fiber optoelectronics. Microstructural studies of the deposited material using Raman spectroscopy show effects due to strain between core and cladding and the presence of amorphous and polycrystalline phases for silicon. Germanium, in contrast, is more crystalline and less strained. This in-fiber device geometry is utilized for two- and three-terminal electrical characterization of the key parameters of resistivity and carrier type, mobility and concentration.

An Effective Channel Mobility-Based Analytical On-Current Model for Polycrystalline Silicon Thin-Film Transistors

Abstract: A physical-based analytical ON-state drain-current model was developed based on a mobility model including both grain boundary barrier-controlled carrier conduction and gate voltage dependent mobility degradation. Mobility variation along the conduction channel caused by both effects was taken into account. The derived drain-current can be approximated by a previously followed form, however, with mobility term modified and saturation factor included. Our experimental effective channel mobility and above-threshold drain-current data from both low-temperature and high-temperature processed polycrystalline silicon thin-film transistors can be accurately fitted by the model, without introducing any empirical or artificial factors