Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.

Method for manufacturing capacitor of highly integrated semiconductor memory device

Abstract: A method for manufacturing a capacitor of a highly integrated semiconductor memory device including a plurality of memory cells, each of which has a transistor and a capacitor. The method comprises the steps of forming an insulating layer for insulating the transistor, forming a contact hole to electrically connect to a source region by etching the insulating layer, sequentially forming a first polycrystalline silicon layer, an oxide layer, and a second polycrystalline silicon layer consisting of grains, exposing the second polycrystalline silicon layer to an oxide etchant, partially etching the oxide layer by the oxide etchant penetrating along the peripheries of the grains, anistropically etching the whole second polycrystalline silicon layer and, at the same time, the partial first polycrystalline silicon layer also, using the oxide layer being unaffected by the oxide etchant, as a mask, removing the oxide layer, forming a storage electrode by defining into cell units the first polycrystalline silicon layer, sequentially forming a dielectric film and a plate electrode formed of a third polycrystalline silicon layer over the resultant structure. Thus, the physical properties of the material itself is used without any specific conditions and unrestricted by limitation of minimum feature size. Furthermore, the process is greatly simplified and the effective capacitance of the cell capacitor is easily extended.

Energy distribution of trapping states in polycrystalline silicon

Abstract: The electronic density of states in the forbidden gap of polycrystalline silicon has been determined from an analysis of capacitance and conductance of a Metal/SiO2 (∼60 A)/polycrystalline silicon(∼250 A)/Si(111) (MOSS) structure. In this structure the thickness of the polycrystalline silicon is comparable to its grain size. Net density of trapped charges in the polycrystalline silicon is enough to terminate the electric field penetrating from the oxide layer. Then, two‐terminal admittance of the MOSS structure is dominated by charging or discharging of the trapping states in a wide range of applied gate bias. The U‐shaped distribution of trapping state density has been found for thin polycrystalline silicon films.

Microfabricated filter and capsule using a substrate sandwich

Abstract: A microfabricated filter made up of two bonded substrate structures, each consisting of single crystalline silicon can optionally be formed into a capsule. The pores of the filter consist of one or more channels disposed between the two substrate structures. The width of the channels are defined by a thickness of a sacrificial layer formed on one of the substrate structures. The filter includes pores having a precisely controlled pore width which may be as small as 5 nanometers. The filter provides a relatively high mechanical strength relative to filters having polycrystalline silicon structures and also has a high throughput and can be modified to have high resistance to adsorption of particles.

Silicon : Evolution and Future of a Technology

Abstract: 1 Introduction: Silicon in All Its Forms.- 2 Silicon: the Semiconductor Material.- 3 Silicon: an Industrial Adventure.- 4 Polycrystalline Silicon Films for Electronic Devices.- 5 Silicon for Photovoltaics.- 6 Films by Molecular-Beam Epitaxy.- 7 Amorphous Hydrogenated Silicon, a-Si:H.- 8 Silicon-on-Insulator and Porous Silicon.- 9 Defect Spectroscopy.- 10 Silicon and Its Vital Role in The Evolution of Scanning Probe Microscopy.- 11 Defects, Diffusion, Ion Implantation, Recrystallization, and Dielectrics.- 12 Neutron Transmutation Doping (NTD) of Silicon.- 13 Transition Metal Impurities in Silicon.- 14 Hydrogen.- 15 Power Semiconductor Devices.- 16 Compensation Devices Break the Limit Line of Silicon.- 17 Integrated Circuits.- 18 Silicon Nanoelectronics: the Next 20 Years.- 19 Lithography for Silicon Nanotechnology.- 20 Silicon Sensors.- 21 Supplementing Silicon: the Compound Semiconductors.- 22 Quantum Computation by Electron Spin in SiGe Heterostructures.- 23 Carbon Nanotube Applications in Microelectronics.- 24 Creating Systems for Ambient Intelligence.- 25 Semiconductors with Brain.

Pulse‐time modulated electron cyclotron resonance plasma etching for highly selective, highly anisotropic, and less‐charging polycrystalline silicon patterning

Abstract: Highly selective, highly anisotropic, notch‐free and charge build‐up damage‐free polycrystalline silicon etching is achieved using an electron cyclotron resonance plasma modulated at a pulse time in the range of 10–20 μs. In this plasma, the selectivity ratio of the polycrystalline silicon etching rate to the SiO2 etching rate is increased significantly by the same etching rate as that attained using a continuous discharge. Additionally, vertical and notch‐free phosphorus‐doped polycrystalline silicon etching profiles and suppressing charge build‐up damage can be achieved. These results are attained by controlling the ion energy distribution through the duty ratio, maintaining a high ion current density, generating a collimated ion flux, and eliminating surface charge with the pulsed discharge.