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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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BookDOI
10 Oct 2012
TL;DR: Polycrystalline Silicon for Integrated Circuits and Displays, Second Edition as mentioned in this paper presents much of the available knowledge about polysilicon, and it represents an effort to interrelate the deposition, properties, and applications of poly-silicon.
Abstract: Polycrystalline Silicon for Integrated Circuits and Displays, Second Edition presents much of the available knowledge about polysilicon. It represents an effort to interrelate the deposition, properties, and applications of polysilicon. By properly understanding the properties of polycrystalline silicon and their relation to the deposition conditions, polysilicon can be designed to ensure optimum device and integrated-circuit performance. Polycrystalline silicon has played an important role in integrated-circuit technology for two decades. It was first used in self-aligned, silicon-gate, MOS ICs to reduce capacitance and improve circuit speed. In addition to this dominant use, polysilicon is now also included in virtually all modern bipolar ICs, where it improves the basic physics of device operation. The compatibility of polycrystalline silicon with subsequent high-temperature processing allows its efficient integration into advanced IC processes. This compatibility also permits polysilicon to be used early in the fabrication process for trench isolation and dynamic random-access-memory (DRAM) storage capacitors. In addition to its integrated-circuit applications, polysilicon is becoming vital as the active layer in the channel of thin-film transistors in place of amorphous silicon. When polysilicon thin-film transistors are used in advanced active-matrix displays, the peripheral circuitry can be integrated into the same substrate as the pixel transistors. Recently, polysilicon has been used in the emerging field of microelectromechanical systems (MEMS), especially for microsensors and microactuators. In these devices, the mechanical properties, especially the stress in the polysilicon film, are critical to successful device fabrication. Polycrystalline Silicon for Integrated Circuits and Displays, Second Edition is an invaluable reference for professionals and technicians working with polycrystalline silicon in the integrated circuit and display industries.

231 citations

Journal ArticleDOI
TL;DR: In this article, a 3D shared-memory test chip with three-stacked layers was fabricated by bonding the wafers with vertical buried interconnections after thinning.
Abstract: A three-dimensional (3-D) integration technology has been developed for the fabrication of a new 3-D shared-memory test chip. This 3-D technology is based on the wafer bonding and thinning method. Five key technologies for 3-D integration were developed, namely, the formation of vertical buried interconnections, metal microbump formations, stacked wafer thinning, wafer alignment, and wafer bonding. Deep trenches having a diameter of 2 mum and a depth of approximately 50 mum were formed in the silicon substrate using inductively coupled plasma etching to form vertical buried interconnections. These trenches were oxidized and filled with n+ polycrystalline silicon or tungsten. The 3-D devices and 3-D shared-memory test chips with three-stacked layers were fabricated by bonding the wafers with vertical buried interconnections after thinning. No characteristic degradation was observed in the fabricated 3-D devices. It was confirmed that fundamental memory operation and broadcast operation between the three memory layers could be successfully performed in the fabricated 3-D shared-memory test chip

230 citations

Patent
02 Dec 2004
TL;DR: In this article, the bipolar transistor was made to have a structure where a polycrystalline silicon layer doped with an impurity of a second conduction type is buried in an external base polyc-stalline transistor in the vicinity of an emitter.
Abstract: PROBLEM TO BE SOLVED: To provide a bipolar transistor of a self-aligned structure which has an improved current gain cut-off frequency and maximum transmission frequency, and to provide a method of manufacturing the transistor SOLUTION: The bipolar transistor in made to have a structure where a polycrystalline silicon doped with an impurity of a second conduction type is buried in an external base polycrystalline silicon in the vicinity of an emitter at a position of the lower part of the external base polycrystalline silicon adjacent to an epitaxial base layer After an insulating film of the lower part of the external base polycrystalline silicon is etched to form a recess, a polycrystalline silicon layer doped with the impurity of the second conduction type is formed, and then etched back to leave the polycrystalline silicon only in the recess, thus obtainable the bipolar transistor COPYRIGHT: (C)2005,JPO&NCIPI

229 citations

Journal ArticleDOI
TL;DR: In this paper, the authors focus on the future developments in the field of c-Si solar cells based on carrier-selective passivation layers and compare combinations of the various options of carrierselective layers concerning their combined selectivities and efficiency potentials.

228 citations

Journal ArticleDOI
TL;DR: In this article, the authors used x-ray diffraction, TEM, SEM, Raman and elastic light scattering, optical absorption and reflection, and other techniques in order to obtain information on the grain size, structure, structural perfection, and surface roughness.
Abstract: Undoped LPCVD silicon films have been deposited at five temperatures between 560° and 620°C. The films were characterized as grown and after thermal annealing at 900°, 950°, and 1000°C. We used x‐ray diffraction, TEM, SEM, Raman and elastic light scattering, optical absorption and reflection, and other techniques in order to obtain information on the grain size, structure, structural perfection, and surface roughness. We found that polysilicon films of good structural perfection, low strain, and small surface roughness are obtained when the films are deposited in the amorphous phase and subsequently crystallized at 900°–1000°C. Such films are superior in all investigated material aspects to films grown in the crystalline phase.

224 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534