Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.

Low Loss (~6.45dB/cm) Sub-Micron Polycrystalline Silicon Waveguide Integrated with Efficient SiON Waveguide Coupler

Abstract: In this communication, the sub-micron size polycrystalline silicon (poly-Si) single mode waveguides are fabricated and integrated with SiON waveguide coupler by deep UV lithography. The propagation loss of poly-Si waveguide and coupling loss with optical flat polarization-maintaining fiber (PMF) are measured. For whole C-band (i.e., λ~1520-1565nm), the propagation loss of TE mode is measured to ~6.45±0.3dB/cm. The coupling loss with optical flat PMF is ~3.4dB/facet for TE mode. To the best of our knowledge, the propagation loss is among the best reported results. This communication discusses the factors reducing the propagation loss, especially the effect of the refractive index contrast. Compared to the SiO2 cladding, poly-Si waveguide with SiON cladding exhibits lower propagation loss.

Method of fabricating power MOSFET structure utilizing self-aligned diffusion and etching techniques

Abstract: A power MOSFET semiconductor structure is fabricated using the steps of depositing an epitaxial layer 12 of N conductivity type silicon on an underlying silicon substrate 10 of N conductivity type, forming a plurality of polycrystalline silicon electrodes 18 on the epitaxial layer 12, each electrode 18 being separated from the epitaxial layer 12 by a layer of insulating material 15; introducing P 30 and N 33 conductivity type impurities into the epitaxial layer 12 between the electrodes 18, the P type impurity 30 underlying the N type impurity 33; removing regions of the epitaxial layer 12 to form openings 21 in the epitaxial layer 12 between the electrodes 18, the removed regions 21 extending through the N type region 33 but not through the P type region 30; and depositing electrically conductive material 40 in the opening 23. The resulting semiconductor structure includes an N type substrate 10, an N type epitaxial layer 12, an opening 21 in the epitaxial layer 12 extending downward a selected distance, an upper N type region 33 surrounding the opening 21 and extending to the surface of the epitaxial layer 12, a lower P type region 30 which extends to the surface of the epitaxial layer 12 and everywhere separates the N type region 33 from epitaxial layer 12, an electrode 40 formed in the opening and extending to the upper surface of the epitaxial layer 12, and a second electrode 18 disposed above epitaxial layer 12 and separated from it by insulating material 15.

Manufacture of semiconductor device

Abstract: PURPOSE:To eliminate the diffusion of impurities into a substrate from a BPSG film and also to eliminate decrease of impurities from a diffused layer by a method wherein a first insulating film is formed on a semiconductor substrate, a BPSG film is formed thereon, and after the pattern of a contact hole has been formed and a fluidizing treatment has been conducted, the whole surface is etched, and the shape after the fluidizing treatment is transferred to the first insulating film. CONSTITUTION:A silicon oxide film is formed on the surface of a P-type silicon substrate 1, a polycrystalline silicon film 3 is deposited thereon, and after a mask M is formed and phosphorus is ion-implanted, a PSG film 10, for example, is formed as a first insulating film. Subsequently, a PSG film 5 is formed in the thickness almost same as the PSG film. Contact holes 6 and 6 are formed on said film 5, a fluidizing treatment is conducted on the BPSG film, the shape of the contact holes is gently sloped, And at the same time, an overall etching is conducted in the thickness of the T1 component as shown in the diagram using a RIE method after an impurity diffusion layer has been formed, the surface of the substrate is exposed, and the shape of the contact holes of the PSG film is transferred in the state as it is. According to this method, phosphorus and boron are not diffused into the substrate when the fluidizing treatment is conducted, and the oxidizing treatment to be conducted on the contact region surface is unnecessitated.

SOI (silicon on insulator) substrate with enhanced gettering effects

Abstract: A silicon-on-insulator (SOI) substrate is arranged such that a polycrystalline silicon film which functions as a gettering site for heavy metals is provided on a first single crystal silicon substrate, a silicon oxide island film is partially provided in a polycrystalline silicon film, and a second single crystal silicon substrate is provided on an entire upper surface of the polycrystalline silicon film. An element isolation trench extends from an upper surface of the second single crystal silicon substrate to an upper surface of the first single crystal silicon substrate, and a silicon oxide film is buried in the element isolation trench. The SOI substrate thus constituted has a high gettering effect for heavy metals.