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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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Patent
14 Jul 2003
TL;DR: A low temperature process for forming a metal doped silicon layer was proposed in this article, in which an amorphous silicon layer is deposited onto a substrate at low temperatures, with a metal layer then deposited upon the silicon layer.
Abstract: A low temperature process for forming a metal doped silicon layer in which an amorphous silicon layer is deposited onto a substrate at low temperatures, with a metal layer then deposited upon the silicon layer. This structure is then annealed at low temperatures (in the range of 170 °C to 600 °C) to form a metal doped polycrystalline silicon having greater than about 1 x 1020 dopant atoms per cm3 of silicon.

57 citations

Journal ArticleDOI
TL;DR: In this article, it was shown that the output characteristics of short-channel polysilicon thin-film transistors (TFTs) are substantially degraded by the kink effect as the channel length is reduced and that the excess current, triggered by the impact ionization and enhanced by the parasitic bipolar transistor action, scales nearly as L−2.
Abstract: Excess current, induced by impact ionization (kink effect) has been investigated in short-channel polysilicon thin-film transistors (TFTs). We have shown, both experimentally and by using two-dimensional (2-D) numerical simulations, that the output characteristics are substantially degraded by the kink effect as the channel length is reduced. In particular, we have shown that the excess current, triggered by the impact ionization and enhanced by the parasitic bipolar transistor action, scales nearly as L−2, thus making very difficult the downscaling of polysilicon TFTs. Such L dependence has been clarified through a detailed analysis of the current components obtained from 2-D numerical simulations. The analysis demonstrates that there are fundamental issues with the output characteristics, and it appears that the introduction of appropriate drain field relief structures will be necessary for the fabrication of short-channel polysilicon TFTs with high output impedance.

57 citations

Journal ArticleDOI
TL;DR: In this paper, the authors achieved low-temperature polycrystalline silicon (LTPS) thin-films with a single orientation on glass by using continuous wave blue laser annealing (BLA) of amorphous silicon (a-Si).

57 citations

Patent
10 Jul 1986
TL;DR: In this article, an amorphous silicon film with a good covering property is deposited on the insulating film in an atmosphere of plasma in order to cover the roughened surface of the semiconductor substrate.
Abstract: PURPOSE:To coat the roughened surface of the semiconductor substrate with an insulating film at a comparatively low temperature and to make gentle the surface by a method wherein an amorphous silicon film with a good covering property is deposited on the insulating film in an atmosphere of plasma CONSTITUTION:Impurity diffusion layers 2 are formed in a single crystal silicon substrate 1 and a silicon oxide film 3 is formed on the single crystal silicon substrate 1 Moreover, after that, polycrystalline silicon wiring layers 4, which act as the gate of a transistor and a wiring, are formed The state of the surface of the semiconductor substrate in this stage is in a state that a comparatively steep roughness of a thickness of 2-3,000Angstrom to 7-8,000Angstrom is formed on the surface An amorphous silicon film 5 of a thickness of about 4,000Angstrom is deposited by decomposing silane gas in an atmosphere of plasma in such a way that this roughness is sufficiently coated with the amorphous silicon film 5 After this, the amorphous silicon film 5 is made to completely oxidize by performing a wet oxidation at about 600 degC to form a silicon oxide film 6

57 citations

Journal ArticleDOI
TL;DR: In this article, a substantial increase in the efficiency of cast polycrystalline solar cells was achieved by incorporating phosphorus pretreatment and rear aluminium treatments into the passivated emitter solar cell (PESC) sequence.
Abstract: A substantial increase to 17.8% in the efficiency of cast polycrystalline solar cells was achieved by incorporating phosphorus pretreatment and rear aluminium treatments into the passivated emitter solar cell (PESC) sequence. The deleterious effects of grain boundaries and defects were nullified to such an extent that the performance of cells produced on the less-expensive polycrystalline material of medium grain size matched the performance of those fabricated on expensive semiconductor-grade substrates. Surface texturing of polycrystalline solar cells by novel approaches appears feasible, with a corresponding 5% relative performance increase anticipated, as observed with crystalline cells. >

57 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534