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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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Journal ArticleDOI
TL;DR: A multiplicity of options, in terms of materials and devices, are currently being developed worldwide as mentioned in this paper, including amorphous and polycrystalline silicon, compound semiconductor thin films such as CuInSe 2 -based alloys, and CdTe thin-film solar cells.

186 citations

Journal ArticleDOI
TL;DR: In this paper, the formation, morphology, and thermal stability of silicides on polysilicon is reviewed. But the authors focus on the formation of the silicide and its morphological stability during high temperature processing.
Abstract: Silicides are widely used in silicon integrated circuits as contacts and interconnections. In many applications silicides are used on polycrystalline silicon (polysilicon) such as the gates of FETs and the emitter of bipolar transistors. The use of silicide on polysilicon structures presents a number of unique challenges both in formation of the silicide and in morphological stability during high temperature processing. The purpose of this paper is to review the formation, morphology, and thermal stability of silicides on polysilicon. Mechanisms for silicide roughening on polysilicon are discussed including non-uniform initial reactions, agglomeration, and silicide enhanced grain growth. Results for silicides on polysilicon are compared with those on single crystal Si where relevant, A detailed description of silicide instability and device degradation is presented for a number of silicides, emphasizing TiSi 2 , CoSi 2 , and WSi 2 . Finally, methods for improving the stability of silicides on polysilicon are discussed.

185 citations

Patent
09 Nov 2006
TL;DR: In this article, a gate insulating film 7 on a high breakdown voltage transistor forming region R1 of the semiconductor substrate 1 by effecting the thermal oxidation of surface of the substrate 1 employing an oxidation preventing film 6 as a mask, was removed and, further, the thermal oxidization of surface was effected employing the oxidation preventing mask 6 as the mask.
Abstract: PROBLEM TO BE SOLVED: To mount a capacitive element constituted of polycrystalline silicon on the same substrate together with a high breakdown voltage transistor, while contriving the simplification of the manufacturing process therefor. SOLUTION: After forming a gate insulating film 7 on a high breakdown voltage transistor forming region R1 of the semiconductor substrate 1 by effecting the thermal oxidation of surface of the semiconductor substrate 1 employing an oxidation preventing film 6 as a mask, an oxidation preventing film 6 on the low breakdown voltage transistor forming region R2 is removed and, further, the thermal oxidation of surface of the semiconductor substrate 1 is effected employing the oxidation preventing film 6 as the mask. Accordingly, a gate insulating film 7 on a high breakdown voltage transistor forming region R1 is thickened and a gate insulating film 8 is formed on the semiconductor substrate 1 in the low breakdown voltage transistor forming region R2 while forming an upper electrode 9c, arranged through the oxidation preventing film 6, in one region on the lower electrode 4. COPYRIGHT: (C)2007,JPO&INPIT

184 citations

Journal ArticleDOI
TL;DR: A polysilicon emitter related solar cell achieving both a high open-circuit voltages (Voc) and a high fill factor (FF) was reported in this article, where the passivation mechanism of these so-called tunnel oxide passivated contacts was outlined and the impact of TCO (transparent conductive oxide) deposition on the injection-dependent lifetime characteristic of the emitter as well as its implications on FF was discussed.
Abstract: Carrier-selective contacts (i.e., minority carrier mirrors) are one of the last remaining obstacles to approaching the theoretical efficiency limit of silicon solar cells. In the 1980s, it was already demonstrated that n-type polysilicon and semi-insulating polycrystalline silicon emitters form carrier-selective emitters which enabled open-circuit voltages (Voc) of up to 720 mV. Albeit promising, to date a polysilicon emitter solar cell having a high fill factor (FF) has not been demonstrated yet. In this work, we report a polysilicon emitter related solar cell achieving both a high Voc = 694 mV and FF = 81%. The passivation mechanism of these so-called tunnel oxide passivated contacts will be outlined and the impact of TCO (transparent conductive oxide) deposition on the injection-dependent lifetime characteristic of the emitter as well as its implications on FF will be discussed. Finally, possible transport paths across the tunnel oxide barrier will be discussed and it will be shown that the passivating...

182 citations

Journal ArticleDOI
TL;DR: In this article, very thin (25-50-nm-thick) amorphous silicon (a-Si) films were crystallized into polycrystalline silicon (polysilicon) films by the combination of low temperature solid phase crystallization (SPC) and subsequent excimer laser annealing (ELA).
Abstract: Very thin (25–50-nm-thick) amorphous silicon (a-Si) films were crystallized into polycrystalline silicon (polysilicon) films by the combination of low temperature solid phase crystallization (SPC) and subsequent excimer laser annealing (ELA). These films are, then, subjected to a standard low temperature process (<600 °C) of thin film transistor (TFT) fabrication. The performance of resultant TFTs was compared to those fabricated on polysilicon films obtained by simple excimer laser annealing of amorphous silicon films. The electrical characteristics of the TFTs were correlated with the structural characteristics of the polysilicon films, using transmission electron microscopy and x-ray diffraction as analytical tools. The polysilicon films obtained by the SPC process consist of large and heavily defected crystalline grains. These defects, however, could be eliminated by melting and solidifying the polysilicon films during the ELA process. As a result, the electrical properties of the 50-nm-thick polysili...

181 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534