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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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Journal ArticleDOI
TL;DR: In this paper, metal-oxide-semiconductor transistors of ultrathin hafnium silicate films with polycrystalline silicon and metal (TaN) gates have been demonstrated.
Abstract: Metal-oxide-semiconductor transistors of ultrathin hafnium silicate films (equivalent oxide thickness (EOT) of 12.5–14 A) with polycrystalline silicon and metal (TaN) gates have been demonstrated. Well-behaved transistor characteristics and EOT stability of Hf silicate with n+ polysilicon indicates good compatibility with polysilicon gate process without use of barrier layer. Transmission electron microscopy analysis indicates that the films have no top interfacial layer with both TaN and polysilicon gates. The films also remain amorphous and show no indication of phase separation even after a 950 °C dopant activation anneal. Hf silicate films also show excellent transistor characteristics with TaN gate. NH3 pretreatment results in degraded transistor characteristics for TaN and poly gate samples. Good capacitance–voltage characteristics and negligible hysteresis (<10 mV) was observed in the capacitors after a 1000 °C activation indicating good electrical stability at high temperatures and minimal charge ...

48 citations

Patent
31 Mar 1995
TL;DR: In this paper, a semiconductor integrated circuit including a MOSFET having a polycide gate structure, a resistor and a capacitor is monolithically manufactured, and the remaining dielectric films are used as an etching protection mask for the resistor and capacitor.
Abstract: A semiconductor integrated circuit including a MOSFET having a polycide gate structure, a resistor and a capacitor is monolithically manufactured. Polycrystalline silicon film, a dielectric film, and another polycrystalline silicon film are consecutively deposited. After processes of patterning and etching the dielectric film, the remaining dielectric films are used as an etching protection mask for the resistor and a capacitor. A refractory metal silicide for a polycide gate is uniformly deposited over the remaining another polycrystalline silicon films and dielectric films. The refractory metal silicide and polycrystalline silicon are consecutively etched through a patterned resist mask and the remaining dielectric films to simultaneously form the polycide gate, resistor and capacitor. Thus, a capacitor having small change in capacitance versus applied voltage is manufactured in a MOS IC device having a polycide gate.

48 citations

Patent
Hiroshi Fujioka1
27 Mar 1992
TL;DR: In this article, a stacked capacitor with a fin structure is constructed on a semiconductor substrate and a second electrode is formed over the first electrode and spaced therefrom by a dielectric film.
Abstract: A stacked capacitor having a fin structure, and a method of fabrication. A first electrode with a fin structure is formed on a semiconductor substrate and a second electrode is formed over the first electrode and spaced therefrom by a dielectric film. The first electrode comprises an electrically conductive material, different from polycrystalline silicon, and a polycrystalline silicon film containing an impurity and covering the electrically conductive material. Thereby, the film thickness of the storage electrode of the fin capacitor is reduced and the corrugation of the surface of a memory device by the capacitor structure is mitigated.

48 citations

Journal ArticleDOI
TL;DR: In this paper, the authors used polysilicon resonators to determine stress-lifetime fatigue behavior in several environments, and found that oxide layers are found to show up to four-fold thickening after cycling, which is not seen after monotonic loading or after cycling in vacuo.

48 citations

Journal ArticleDOI
TL;DR: In this article, it was shown that polycrystalline silicon films with high surface smoothness, good step coverage, and a relatively large grain size of ∼0.3 μm have been prepared by low-pressure chemical vapor deposition in the amorphous state and subsequent crystallization in a furnace.
Abstract: Polycrystalline silicon films with high surface smoothness, good step coverage, and a relatively large grain size of ∼0.3 μm have been prepared by low‐pressure chemical vapor deposition in the amorphous state and subsequent crystallization in a furnace. The final grain size achieved does not significantly depend on the initial annealing temperature used to crystallize the layer. For heavily boron implanted films, a clear correlation between sheet resistance and average grain size is found and the resistivity is close to the single crystal value for the amorphously deposited films. In contrast, only a minor resistivity reduction relative to standard polycrystalline silicon could be achieved by amorphous deposition for arsenic implanted films.

48 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534