Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.

Field effect in large grain polycrystalline silicon

Abstract: Measurements have been carried out on transistors made in laser recrystallized polycrystalline silicon. In these devices, grain size is comparable to channel dimensions. A 2-D investigation of the band curvature near a grain boundary has made it possible to model transistor characteristics. Good agreement has been found between theory and experiments.

The work function difference of the MOS-system with aluminium field plates and polycrystalline silicon field plates

Abstract: The work function difference of the AlSiO 2 Si-system was measured by the MOS-capacitance-voltage technique for n - and p -type silicon as substrate and was compared to the results obtained by different authors applying the photoemission technique. It could be seen that the work function differences measured in this work differ largely from the values measured by the photoemission technique. On the basis of the results obtained the work function differences of the p + polySiSiO 2  nSi - and n + polySiSiO 2  p Si-system were defined by comparative measurements. From this it was evident that the location of the Fermi level in heavily doped polycrystalline silicon is identical to the location of the Fermi level in monocrystalline silicon of the same impurity concentration.

Superintegrated v-groove isolated bipolar and vmos transistors

Abstract: The invention concerns a semiconductor structure having a compatible mixture of bipolar and unipolar transistors. In that structure a monocrystalline p-type silicon substrate is employed which has its 1-0-0 crystallographic planes at a face on which an n epitaxial layer was grown. The epitaxial layer is divided into electrically isolated parts by V-grooves that extend down through the epitaxial layer and have their apices terminating in the substrate. A thin silicon dioxide film coats the V-grooves and those grooves are filled with polycrystallie silicon. Where it is desired to use the polycrystalline silicon as the insulated gate of a field effect transistor, the polycrystalline silicon is electrically conductive. Bases for bipolar transistors are formed by diffusion of an appropriate impurity into selected areas of the epitaxial layer. The emitters, drains, and sources are formed by diffusion of a different impurity. Each field effect transistor has its drain and source on adjacent parts of the epitaxial layer which are separated by the V-groove in which the gate is situated. The base and emitter of a bipolar transistor may be situated on one isolated part and the collector may be situated on an adjacent part separated by a V-groove having an electrically conductive polycrystalline filler.

Explanation for the leakage current in polycrystalline-silicon thin-film transistors made by Ni-silicide mediated crystallization

Abstract: The source of the leakage current in polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) made by Ni-mediated crystallization has been investigated. Studies of TFTs and of the crystallization process by in situ transmission electron microscopy show that the crystallization process is a two-stage process and that the cause of the leakage problem is associated with incomplete crystallization of amorphous-Si. By removing the last pockets of amorphous-Si, for instance, by long anneals, poly-Si TFTs can be made with adequately low leakage current <1 pA/μm (at a source–drain voltage of 5 V) for display applications, despite the presence of Ni up to 2.5×1019 atoms/cm3.

Pulsed-laser annealing, a low-thermal-budget technique for eliminating stress gradient in poly-SiGe MEMS structures

Abstract: In this paper, we demonstrate eliminating the stress gradient in polycrystalline silicon germanium films at temperatures compatible with standard CMOS (Al interconnects) backend processing. First, we study the effect of varying the germanium concentration from 40% to 90%, layer thickness, deposition pressure from 650 to 800 mtorr and deposition temperature from 400 to 450/spl deg/C, on the mechanical properties of SiGe films. Then the effect of excimer laser annealing (248 nm, 38 ns, 780 mJ/cm/sup 2/) on stress gradient is analyzed. It is demonstrated that stress gradient can be eliminated completely by depositing Si/sub x/Ge/sub 1-x/(10%