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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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Journal ArticleDOI
TL;DR: In this paper, a 200nm-thick polycrystalline Si films were deposited by changing the deposition temperature (Td=150-750°C) using plasma-enhanced chemical vapor deposition of monosilane-hydrogen mixtures.
Abstract: The 200-nm-thick polycrystalline Si films were deposited by changing the deposition temperature (Td=150–750 °C) using plasma-enhanced chemical vapor deposition of monosilane–hydrogen mixtures. The structural and bonding properties were examined using techniques of Raman scattering, x-ray diffraction, infrared (IR) absorption, and electron spin resonance. Except for Td at 150 and 650 °C, crystallization of the films was observed, and the occurrence of two IR absorption bands around 850 and 1000 cm−1 and an increase in the density of Si dangling bonds were observed in the range of Td higher than 500 °C. These origins were discussed in connection with the mechanisms of disappearance of crystalline phases from the film at Td=650 °C.

45 citations

Patent
01 Apr 1982
TL;DR: In this article, a method for fabricating polycrystalline silicon resistors is described which includes deposition of a polycrystaline silicon layer of very fine grain size upon an insulator surface, followed by ion implantation of boron equal to or slightly in excess of the solubility limit.
Abstract: A method for fabricating polycrystalline silicon resistors is described which includes deposition of a polycrystalline silicon layer of very fine grain size upon an insulator surface, followed by ion implantation of boron equal to or slightly in excess of the solubility limit of the polycrystalline silicon. This ion implantation is normally done using a screen silicon dioxide surface layer. The structure may be annealed at temperatures of between about 800° C. to 1100° C. for 15 to 180 minutes to control the grain size of the polycrystalline silicon layer, homogenize the distribution of the boron ions throughout the entire film thickness and to raise the concentration of the boron in the silicon grains to the solid solubility limit. The suitable electrical contacts are now made to the polycrystalline silicon layer to form the resistor.

45 citations

Patent
27 Oct 1980
TL;DR: In this paper, a partial silicide layer under a polycrystalline silicon (polysi) first level interconnect reduces the sheet resistance of the first-level interconnect, and the polysi insulates the silicide from possibly reactive materials and gases.
Abstract: A partial silicide layer under a polycrystalline silicon (polysi) first level interconnect reduces the sheet resistance of the first level interconnect. The polysi insulates the silicide from possibly reactive materials and gases. Since the silicide is not deposited over contacts between the polysi and the substrate, conventional polysi/silicon ohmic contacts can be made.

44 citations

Patent
11 Mar 1987
TL;DR: In this paper, a flat polycrystalline silicon gate insulating film interface has been obtained by a method wherein, after a silicon film having amorphous silicon as the main component has been formed, a heat treatment is conducted at a low temperature in an oxidizing atmosphere for the purpose of improving crystallizability and the formation of thermally oxided film on the surface of the silicon film.
Abstract: PURPOSE:To obtain a flat polycrystalline silicon gate insulating film interface having a few interfacial levels by a method wherein, after a silicon film having amorphous silicon as the main component has been formed, a heat treatment is conducted at a low temperature in an oxidizing atmosphere for the purpose of improving crystallizability and the formation of thermally oxided film on the surface of the silicon film. CONSTITUTION:A silicon film 2 having amorphous silicon as the main compo nent is formed on a glass substrate 1, then the surface of the silicon film 2 is oxidized, the crystallizability of the silicon film 2 is enhanced and a thermally oxided film 31 is formed by conducting a heat treatment at 600 deg.C. Then, the polycrystalline silicon film 2 is insularly etched together with the oxide film 31 by selectively masking the oxide film 31, and then the second layer of an oxide film 32 is deposited on the oxide film 31. Lastly, a gate shape is formed by selectively etching the oxide films 31 and 32. As a result, a clean interface having a few interfacial levels can be obtained, the interface of the polycrystalline silicon film and the oxide film is formed into flat shape having few recesses and projections, and the oxide film can also be formed to be uni form in thickness.

44 citations

Journal ArticleDOI
TL;DR: In this paper, the authors crystallize amorphous silicon films with a doubled Nd:YVO4 laser operating at a repetition frequency of up to 50 kHz, and a sequential lateral solidification process yields polycrystalline silicon with grains longer than 100 μm and a width between 0.27 and 1.7 μm.
Abstract: We crystallize amorphous silicon films with a frequency doubled Nd:YVO4 laser operating at a repetition frequency of up to 50 kHz. A sequential lateral solidification process yields polycrystalline silicon with grains longer than 100 μm and a width between 0.27 and 1.7 μm depending on film thickness and laser repetition frequency. The average grain size is constant over the whole crystallized area of 25 cm2. Thin film transistors with n- type and p-type channels fabricated from the polycrystalline films have average field effect mobilities of μn = 467 cm2/Vs and μp = 217 cm2/Vs respectively. As a result of the homogeneous grain size distribution, the standard deviation of the mobility is only 5%.

44 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534