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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


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Patent
12 May 2009
TL;DR: A rare earth-containing glass material having a composition, expressed in mole percentages on and oxide basis, comprising: SiO2: 66-75 Al2O3: 11-17 B 2 O3: 0-4 MgO: 1-6.5 CaO: 2-7 SrO: 0 -4 BaO:0-4 Y2O 3: 0.1-4 La 2 O 3:0 -4 Y 2O 3+La O 3 :0.4 La O 3 + Y O 3+Y 2O3 :
Abstract: A rare-earth-containing glass material having a composition, expressed in mole percentages on and oxide basis, comprising: SiO2: 66-75 Al2O3: 11-17 B2O3: 0-4 MgO: 1-6.5 CaO: 2-7 SrO: 0-4 BaO: 0-4 Y2O3: 0-4 La2O3: 0-4 Y2O3+La2O3: 0.1-4. The inclusion of Y2O3 and/or La2O3 in the composition reduces the T2.3 of the glass thereby allowing higher annealing-point glasses to be produced. The glass is particularly useful for low-temperature polycrystalline silicon-based semiconductor devices.

42 citations

Journal ArticleDOI
TL;DR: In this paper, a united method of combining electromagnetic separation and slag treatment technology was used to separate and purify silicon from silicon kerf, which can improve the separation effect of silicon from slag phase.

42 citations

Journal ArticleDOI
TL;DR: In this article, a flash lamp was used to generate white light with a wavelength range of 400-800 nm for 40 μs, thereby supplying the energy necessary to crystallize amorphous silicon films to poly-Si films.
Abstract: We have investigated xenon (Xe) flash lamp annealing for the crystallization of amorphous silicon (a-Si) films for polycrystalline silicon (poly-Si) thin film transistors on glass substrates. The Xe flash lamp emits white light with a wavelength range of 400-800 nm for 40 μs, thereby instantaneously supplying the energy necessary to crystallize a-Si films to poly-Si films. The distance between electrodes in the lamp is 1000 mm, the bore diameter is 10 mm, and the peak voltage is up to 20 kV. The sample structure is a-Si (50 nm)/SiOx (100 nm) deposited on a glass substrate by plasma-enhanced chemical vapor deposition using SiH 4 gas. An average grain size of 500 nm is obtained without substrate heating during Xe flash lamp annealing when the light energy density is 1.82 J/cm 2 . The grain size is less than 50 nm at 1.55-1.78 J/cm 2 , and a significant grain growth occurs at 1.82 J/cm 2 . The light energy is absorbed by the whole a-Si film, because the Xe flash lamp emits light with a wide wavelength range of 400-800 nm. Therefore, when the light energy exceeds its threshold at which the a-Si film melting point is observed, a-Si films can be partially melted and subsequently crystallized at the top and bottom surfaces, thereby forming large-grain poly-Si.

42 citations

Journal ArticleDOI
TL;DR: In this article, the orientation of disk-like grains in polycrystalline silicon (poly-Si) formed by silicide-mediated crystallization (SMC) of amorphous silicon (a-Si), with a silicon-nitride cap on it, was compared with those of needle-like crystallites.
Abstract: Crystalline orientations of disklike grains in polycrystalline silicon (poly-Si) formed by silicide-mediated crystallization (SMC) of amorphous silicon (a-Si) have been studied and compared with those of needlelike crystallites. The disklike grain can be obtained by SMC of a-Si with a silicon–nitride cap on it and its size is as large as 42 μm by using the average Ni area density of 2.43×1014 cm−2 on the cap. On the other hand, the poly-Si crystallized without the cap layer is composed of needlelike crystallites. The electron diffraction (ED) patterns of transmission electron microscope (TEM) remain unchanged for the selected area from 1 to 10 μm diameter inside of the disklike grain, but the ED patterns of SMC poly-Si composed of needlelike crystallites show a ring pattern for the area of 10 μm diameter due to many crystalline orientations. Electron backscattered diffraction and TEM analysis indicate that each disk-like grain has a single orientation, but its orientation is not always the same as that of...

42 citations

Patent
26 Apr 1988
TL;DR: In this paper, a vertical trench etched several microns deep into the silicon extending into a buried diffusion region is used to confine a vertical interconnect element, which can be a high resistivity undoped polycrystalline silicon load resistor, a medium resistivity doped polycalystalline Silicon load resistor or a low resistivity interconnect to the diffusion region.
Abstract: A vertical trench etched several microns deep into the silicon extending into a buried diffusion region is used to confine a vertical interconnect element. This element can be a high resistivity undoped polycrystalline silicon load resistor, a medium resistivity doped polycrystalline silicon load resistor, or a low resistivity interconnect to the buried diffusion region. This new structure can be used in compact and scalable MOS and bipolar inverters and in bistable memory storage cells.

42 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534