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Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.


Papers
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Journal ArticleDOI
TL;DR: The photovoltaic industry is in a phase of rapid expansion, growing at over 30 % per annum over recent years as mentioned in this paper, and most commercial solar cells presently use self-supporting bulk crystalline or multicrystalline silicon wafers.
Abstract: The photovoltaic industry is in a phase of rapid expansion, growing at over 30 % per annum over recent years. Although technologies based on thin-film compound and alloy solar cells are under active development, most commercial solar cells presently use self-supporting bulk crystalline or multicrystalline silicon wafers, similar to those used in microelectronics. The laboratory performance of these cells, at 25 % solar energy conversion efficiency, is now approaching thermodynamic limits, with the challenge being to incorporate these improvements into low-cost commercial products. Improvements in cell optical design, particularly in their ability to “trap” weakly absorbed light, has also led to a growing interest in thin-film cells based on polycrystalline silicon, having advantages over other thin film photovoltaic candidates.

41 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the three stages of nucleation, textured grain growth and secondary grain growth in polycrystalline silicon films by using excimer laser annealing.
Abstract: Recrystallization of polycrystalline silicon (poly-Si) film by excimer laser annealing (ELA) is discussed by considering the experimental results that the three stages of nucleation, textured grain growth and secondary grain growth were observed. Although the phenomenon of nucleation in the amorphous silicon (a-Si) is understood by considering crystallization from the super cooled liquid, the growth mechanisms of the textured grain and secondary grain are not understood by this, because the melting point of poly-Si which has already been formed on the entire surface during these growth stages is higher than that of a-Si. The recrystallization mechanism considering the dislocation movement is introduced to investigate the present phenomenon. It also clarifies the reason why secondary grain growth occurs under the critical conditions of laser irradiation energy and shot number. The feasibility of nucleation through the super cooled liquid is also discussed.

41 citations

Journal ArticleDOI
TL;DR: In this article, a physical-based analytical ON-state drain-current model was developed based on a mobility model including both grain boundary barrier-controlled carrier conduction and gate voltage dependent mobility degradation.
Abstract: A physical-based analytical ON-state drain-current model was developed based on a mobility model including both grain boundary barrier-controlled carrier conduction and gate voltage dependent mobility degradation. Mobility variation along the conduction channel caused by both effects was taken into account. The derived drain-current can be approximated by a previously followed form, however, with mobility term modified and saturation factor included. Our experimental effective channel mobility and above-threshold drain-current data from both low-temperature and high-temperature processed polycrystalline silicon thin-film transistors can be accurately fitted by the model, without introducing any empirical or artificial factors

41 citations

Patent
H.W. Lam1
28 Sep 1984
TL;DR: In stacked CMOS, a single gate in first level polycrystalline silicon is used to address both an N-channel device in the substrate and an overlaid p-channel devices as discussed by the authors.
Abstract: In stacked CMOS, a single gate in first level polycrystalline silicon is used to address both an N-channel device in the substrate and an overlaid p-channel device. The p-channel device has self-aligned source and drain regions formed by diffusing a dopant from doped regions underlying them. The doped regions are formed by planarizing a doped insulating layer, and etching the doped layer back to the upper level of the gate prior to deposition of a second polysilicon layer.

41 citations

Patent
12 Jan 1993
TL;DR: In this article, a process for the preparation of polycrystalline silicon ingots by providing a first layer of coating on the inside walls of a mold with a slurry of silicon nitride powder in an organic binder dissolved in a solvent was described.
Abstract: This invention relates to a process for the preparation of polycrystalline silicon ingots by providing a first layer of coating on the inside walls of a mold with a slurry of silicon nitride powder in an organic binder dissolved in a solvent; charging the said coated mold with silicon pieces along with calcium chloride or/and calcium fluoride; heating the mold to a temperature in the range of 1420°-1500° C. so as to melt the silicon, by keeping the mold inside the furnace; bringing down the temperature of the mold to a temperature 5°-10° C. above the melting point of silicon; withdrawing the mold containing the melt downwardly and slowly from the hot zone of the furnace so that the solidification of the melt starts from the bottom of the mold and proceeds towards the top as the withdrawal continues till all the melt solidifies; cooling the mold to the room temperature under inert atmosphere and removing the polycrystalline silicon ingot from the mold.

41 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202343
2022130
2021122
2020313
2019498
2018534