Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.

A comprehensive analytical and numerical model of polysilicon emitter contacts in bipolar transistors

Abstract: A comprehensive model-both analytical and numerical-is proposed as a tool to analyze heavily doped emitters of transistors with polycrystalline silicon (polysilicon) contacts. The grains and grain boundaries of polysilicon, the interfacial oxide-like layer between polycrystalline and monocrystalline silicon are lumped respectively into "boxes" in which the drift minority current component is neglected. The mobility reduction of carriers in polysilicon on the whole is explicitly attributed to the additional scattering due to the lattice disorder in the grain boundaries and the carrier tunneling through the interface. The effect of the poly-contacts on transistors can be modeled as a reduced surface recombination velocity for minority carriers in combination with a series emitter resistance for majority carriers. Furthermore, by characterizing the monocrystalline emitter with an effective recombination velocity, the effect of the polysilicon layer on the current gain can be analyzed analytically. Computer simulation is used to verify the assumptions of the model formulation. Using published data [1], the analytical and numerical approaches are compared and it is shown that for these devices a unique combination of physical parameters are needed for the model to fit the data.

Large open-circuit voltage improvement by rapid thermal annealing of evaporated solid-phase-crystallized thin-film silicon solar cells on glass

Abstract: In this letter, we investigate the impact of rapid thermal annealing (RTA) on thin-film polycrystalline silicon (pc-Si) solar cells on glass made by evaporation of amorphous silicon (a-Si) and subsequent solid-phase crystallization (SPC). These devices have the potential to deliver low-cost photovoltaic electricity and are named EVA cells (SPC of EVAporated a-Si). The RTA is used to perform a high-temperature (>700°C) process for point defect annealing and dopant activation. RTA processes have predominantly been developed for wafer-based devices yet also have great potential for low-temperature devices such as thin-film pc-Si on glass solar cells. Parameter variations are performed on EVA solar cells to determine optimum values for point defect removal and dopant activation while minimizing dopant diffusion causing junction smearing. The 1-Sun open-circuit voltage, Voc, of the as-crystallized pc-Si devices is rather modest (135mV). However, after RTA and subsequent hydrogen passivation in a rf PECVD plasm...

Transparent, High-Performance Thin-Film Transistors with an InGaZnO/Aligned-SnO2-Nanowire Composite and their Application in Photodetectors

Abstract: A high mobility of 109.0 cm(2) V(-1) s(-1) is obtained by thin-film transistors (TFTs) comprising a composite made by aligning SnO2 nanowires (NWs) in amorphous InGaZnO (a-IGZO) thin films. This composite TFT reaches an on-current density of 61.4 μA μm(-1) with a 10 μm channel length. Its performance surpasses that of single-crystalline InGaZnO and is comparable with that of polycrystalline silicon.

High-voltage planar devices using field plate and semi-resistive layers

Abstract: An improved high-voltage technique based on the use of a field plate combined with semiresistive layers (SIPOS) on oxide is proposed. The field plate and SIPOS (semi-insulating polycrystalline silicon) are shown to have complementary functions. Junction curvature electric field effects are reduced by the presence of the field plate. The silicon surface potential is linearized by a primary SIPOS layer on oxide, thereby reducing the peak electric field at the edge of the field plate. A second high-resistivity SIPOS layer provides an excellent passivation, and also prevents the dielectric breakdown of the underlayer SIPOS film. Moreover, the savings in chip area is about 20% compared to the standard mesa termination. The global yield is 94% for the SIPOS planar transistors and 86% for equivalent devices in mesa technology. The complete fabrication, design, electrical characteristics, and reliability of high-voltage planar transistors are described. >

Effect of hydrogen termination on the work of adhesion between rough polycrystalline silicon surfaces

Abstract: A novel micromachined test structure has been used to measure the work of adhesion between polycrystalline silicon surfaces. The effects of several surface treatments, including a hydrogen- and an ammonium-fluoride-induced hydrogen termination and a hydrogen peroxide chemical oxidation, have been investigated with these test structures. A reduction in the average apparent work of adhesion by a factor of 2000 has been observed on the NH4F-treated surface compared to the oxide-coated surface. By using x-ray photoelectron spectroscopy and atomic force microscopy, the observed reduction is traced to the combined effect of the surface chemistry and topography. This work demonstrates that a hydrophobic, rough surface provides a significant reduction of the apparent work of adhesion in polysilicon micromachined devices.