Polycrystalline silicon

About: Polycrystalline silicon is a research topic. Over the lifetime, 19554 publications have been published within this topic receiving 198222 citations. The topic is also known as: polysilicon & poly-Si.

Production and purification of silicon by calcium reduction of rice-husk white ash

Abstract: Polycrystalline silicon of reasonable purity has been prepared by metallothermic reduction of purified rice-husk white ash (amorphous silica) by using calcium. The mechanism of reduction of the silica with calcium was investigated using simultaneous thermogravimetric analysis and differential thermal analysis, which revealed the reduction temperature to be around 720‡ C. The paper also discusses the method of preparation of silicon and its purification procedure. Characterization of the silicon sample thus prepared was made by X-ray diffraction, scanning electron microscopy and emission spectrography.

Composite silicide gate electrodes—Interconnections for VLSI device technologies

Abstract: A potentially severe limit on density, performance, and wirability of polysilicon-gate technologies for VLSI applications, is the high resistivity of polycrystalline silicon. Composite structures of highly conductive molybdenum or tungsten disilicide on top of polysilicon (polycide) are shown to be a viable alternative gate electrode and interconnect level. Sheet resistance values of 1-3 Ω/□ for an integrated structure are easily attainable. IGFET devices fabricated to channel lengths of ≥ 1.4 µm show the polycide devices to be indistinguishable from normal polysilicon gate devices.

Fabrication of polysilicon fets on alkaline earth alumino-silicate glasses

Abstract: A method of fabricating polycrystalline silicon thin film field effect transistors on low cost alkaline earth alumino-silicate glass substrates which can tolerate device processing temperatures of approximately 800° C.

High performance bipolar device and method for making same

Abstract: A method for manufacturing a high performance bipolar device and the resulting structure which has a very small emitter-base spacing is described. The small emitter-base spacing, reduces the base resistance compared to earlier device spacing and thereby improves the performance of the bipolar device. The method involves providing a silicon semiconductor body having regions of monocrystalline silicon isolated from one another by isolation regions and a buried subcollector therein. A base region is formed in the isolated monocrystalline silicon. A mask is formed on the surface of the silicon body covering those regions designated to be the emitter and collector reach-through regions. A doped polycrystalline silicon layer is then formed through the mask covering the base region and making ohmic contact thereto. An insulating layer is formed over the polysilicon layer. The mask is removed from those regions designated to be the emitter and collector reach-through regions. The emitter junction is then formed in the base region and the collector reach-through formed to contact the buried subcollector. Electrical contacts are made to the emitter and collector. The doped polycrystalline silicon layer is the electrical contact to the base regions.

Al‐doped and Sb‐doped polycrystalline silicon obtained by means of metal‐induced crystallization

Abstract: Thin‐film multilayer structures of a‐Si/Al/a‐Si and a‐Si/Sb/a‐Si were deposited by electron‐beam evaporation. The microstructure and the electrical properties of as‐deposited and annealed (T<1370 K) thin films were determined. A p‐n junction was formed between polycrystalline silicon (poly‐Si) doped with Sb and a p‐type Si substrate. Al and Sb were found to induce crystallization of a‐Si at 600 and 700 K, respectively. After annealing to 1370 K for 60 min, the resistivities 7.0×10−3 Ω cm for the Al‐Si sample and 1.4×10−2 Ω cm for the Sb‐Si sample were obtained. Passivation of poly‐Si grain boundaries by Sb is proposed.