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Power-added efficiency

About: Power-added efficiency is a research topic. Over the lifetime, 6676 publications have been published within this topic receiving 88712 citations.


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TL;DR: In this paper, the Fourier series analysis of the collector voltage waveform is used to determine component values for optimum operation at an efficiency of 100 percent, and other combinations of component values and duty cycles are also determined.
Abstract: The class E tuned power amplifier consists of a load network and a single transistor that is operated as a switch at the carrier frequency of the output signal. The most simple type of load network consists of a capacitor shunting the transistor and a series-tuned output circuit, which may have a residual reactance. Circuit operation is determined by the transistor when it is on, and by the transient response of the load network when the transistor is off. The basic equations governing amplifier operation are derived using Fourier series techniques and a high- Q assumption. These equations are then used to determine component values for optimum operation at an efficiency of 100 percent. Other combinations of component values and duty cycles which result in 100-percent efficiency are also determined. The harmonic structure of the collector voltage waveform is analyzed and related amplifier configurations are discussed. While this analysis is directed toward the design of high-efficiency power amplifiers, it also provides insight into the operation of modern solid-state VHF-UHF tuned power amplifiers.

962 citations

Journal ArticleDOI
TL;DR: In this paper, the performance of high-power GaN/Al/sub 0.86/N high-electron mobility transistors (HEMTs) fabricated on semi-insulating (SI) 4H-SiC substrates is reported.
Abstract: Record performance of high-power GaN/Al/sub 0.14/-Ga/sub 0.86/N high-electron mobility transistors (HEMTs) fabricated on semi-insulating (SI) 4H-SiC substrates is reported. Devices of 0.125-0.25 mm gate periphery show high CW power densities between 5.3 and 6.9 W/mm, with a typical power-added efficiency (PAE) of 35.4% and an associated gain of 9.2 dB at 10 GHz. High-electron mobility transistors with 1.5-mm gate widths (12/spl times/125 /spl mu/m), measured on-wafer, exhibit a total output power of 3.9 W CW (2.6 W/mm) at 10 GHz with a PAE of 29% and an associated gain of 10 dB at the -2 dB compression point. A 3-mm HEMT, packaged with a hybrid matching circuit, demonstrated 9.1 W CW at 7.4 GHz with a PAE of 29.6% and a gain of 7.1 dB. These data represent the highest power density, total power, and associated gain demonstrated for a III-nitride HEMT under RF drive.

506 citations

Journal ArticleDOI
TL;DR: In this paper, the authors report on the fabrication and high-frequency characterization of AlGaN/GaN high-electron mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD).
Abstract: We report on the fabrication and high-frequency characterization of AlGaN/GaN high-electron mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD). In devices with a gate length of 160 nm, a record power density of 10.5 W/mm with 34% power added efficiency (PAE) has been measured at 40 GHz in MOCVD-grown HEMTs biased at V/sub DS/=30 V. Under similar bias conditions, more than 8.6 W/mm, with 32% PAE, were obtained on the MBE-grown sample. The dependence of output power, gain, and PAE on gate and drain voltages, and frequency have also been analyzed.

435 citations

Journal ArticleDOI
TL;DR: This paper presents the first reported 28-GHz phased-array IC for 5G communications, implemented in 130-nm SiGe BiCMOS, which includes 32 TRX elements and features concurrent independent beams in two polarizations in either TX or RX operation.
Abstract: This paper presents the first reported 28-GHz phased-array IC for 5G communications. Implemented in 130-nm SiGe BiCMOS, the IC includes 32 TRX elements and features concurrent independent beams in two polarizations in either TX or RX operation. Circuit techniques to enable precise beam steering, orthogonal phase and amplitude control at each front end, and independent tapering and beam steering at the array level are presented. A TX/RX switch design is introduced which minimizes TX path loss resulting in 13.5 dBm/16 dBm Op1dB/Psat per front end with >20% peak power added efficiency of the power amplifier (including switch and off-mode LNA) while maintaining a 6 dB noise figure in the low noise amplifier (including switch and off-mode PA). Comprehensive on-wafer measurement results for the IC across multiple samples and temperature variation are presented. A package with four ICs and 64 dual-polarized antennas provides eight 16-element or two 64-element concurrent beams with 1.4°/step beam steering (<0.6° rms error) across a ±50° steering range without requiring calibration. A maximum saturated effective isotropic radiated power of 54 dBm is measured in the broadside direction for each polarization. Tapering control without requiring calibration achieves up to 20-dB sidelobe rejection without affecting the main lobe direction.

426 citations

Journal ArticleDOI
TL;DR: In this article, a distributed active transformer is presented to combine several low-voltage push-pull amplifiers efficiently with their outputs in series to produce a larger output power while maintaining a 50/spl Omega/match.
Abstract: A novel on-chip impedance matching and power-combining method, the distributed active transformer is presented. It combines several low-voltage push-pull amplifiers efficiently with their outputs in series to produce a larger output power while maintaining a 50-/spl Omega/ match. It also uses virtual ac grounds and magnetic couplings extensively to eliminate the need for any off-chip component, such as tuned bonding wires or external inductors. Furthermore, it desensitizes the operation of the amplifier to the inductance of bonding wires making the design more reproducible. To demonstrate the feasibility of this concept, a 2.4-GHz 2-W 2-V truly fully integrated power amplifier with 50-/spl Omega/ input and output matching has been fabricated using 0.35-/spl mu/m CMOS transistors. It achieves a power added efficiency (PAE) of 41 % at this power level. It can also produce 450 mW using a 1-V supply. Harmonic suppression is 64 dBc or better. This new topology makes possible a truly fully integrated watt-level gigahertz range low-voltage CMOS power amplifier for the first time.

411 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202333
202286
202194
202093
2019124
2018121