Showing papers on "Power integrity published in 1984"
01 Jan 1984
TL;DR: In this article, basic electrical parameters such as self and mutual capaci- tances, characteristic impedance, propagation delay, intra-and in-terlayer crosstalk are evaluated for five types of module designs.
Abstract: The dramatic increase in switching speeds and circuit density in very large-scale integrated (VLSI) chips combined with denser packaging necessitates careful consideration of all the electri- cal characteristics of multichip modules (MCM). The development of high performance large-scale computers places many challenging re- quirements on packaging development engineers. High speed circuits demand low inductive interconnections, low cross talk, controlled characteristic impedance, power integrity, proper i,ine resistance, high power dissipation, and minimum time of flight. Multichip modules provide short interconnection paths and eliminate one corn-- plete level (i.e., the card level) of packaging. Interconnect schemes and circuits must he designed such that the system can operate within electrical constraints such as capacitance loading in&a,- and interlayer crosstalk. The demand for a large number of input/output (I/O) pads on VLSI chips and the vast number of wiring channels needed to interconnect them in a multichip module leads to various compromises in the electrical design of the wiring planes, such as lypes of ground planes and the number of signal planes between references. In this paper basic electrical parameters such as self and mutual capaci- tances, characteristic impedance, propagation delay, intra- and in- terlayer crosstalk are evaluated for five types of module designs. A family of tables consisting of capacitance and inductive matrices, which completely characterize the transmission lines and the matched term/nation coupled noise is presented for multilayer ceramic (MLC) modules.