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Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.


Papers
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Proceedings ArticleDOI
09 May 2006
TL;DR: In this article, the authors proposed two simple procedures to model the simultaneous switching noise (SSN) and evaluate its effects in any point of the board, so as to evaluate the effects of the SSN on the performance of the integrated circuits.
Abstract: When the performances of the electronic technology increase (higher frequencies, more power, lover power supply, faster transistors, reduced chip dimensions), designing electronic equipment becomes more challenging for the electronic engineers. Signal and power integrity on board become of paramount importance. One of the main causes of board malfunctions and electromagnetic radiation is the simultaneous switching noise (SSN) due to the integrated circuits soldered on the board. The paper proposes two simple procedures to model the SSN, so to evaluate its effects in any point of the board

2 citations

Journal ArticleDOI
TL;DR: In this article , power/ground noise suppression structures were designed based on a proposed dispersion analysis for packages and interposers with low-loss substrates, which are suitable for maintaining signal integrity of high-speed channels operating at high data rates.
Abstract: In this study, power/ground noise suppression structures were designed based on a proposed dispersion analysis for packages and interposers with low-loss substrates. Low-loss substrates are suitable for maintaining signal integrity (SI) of high-speed channels operating at high data rates. However, when the power/ground noise is generated in the power delivery network (PDN), low-loss substrates cannot suppress the power/ground noise, thereby causing PDN-induced crosstalk and various power integrity (PI) issues. To solve these issues, noise suppression structures generating electromagnetic bandgap were proposed and designed. The mechanism of the proposed structures was examined based on a proposed dispersion analysis. The proposed structures were designed and fabricated in glass interposer test vehicles, and the effectiveness of the structures on power/ground noise suppression was experimentally validated by measuring the noise suppression band. The proposed dispersion analysis was also verified by comparing the derived noise stopband edges (fL and fU) with electromagnetic (EM) simulation and experimental results, and they all showed good agreement. Compared to EM simulation, the proposed method required smaller computational resources but showed good accuracy. Using the proposed dispersion analysis, various power/ground noise suppression bands were designed considering the applications and design rules of packages and interposers. With measurements and EM/circuit simulations, the effectiveness of the designed structure in maintaining SI/PI was verified. By adopting the designed structures, the noise transfer properties in the PDN were suppressed in the target suppression frequency band, which is key for PI design. Finally, it was verified that the proposed structures were capable of suppressing power/ground noise propagation in the PDN by analyzing PDN-induced crosstalk in the high-speed channel.

2 citations

Proceedings ArticleDOI
29 Oct 2022
TL;DR: In this paper , a semi-analytical approach for the solution of the stress PDE at discrete spatial points in multi-segment lines of power grids, which allows the analytical calculation of EM stress independently at any time in these lines, is presented.
Abstract: As integrated circuit technologies move below 10 nm, Electromigration (EM) has become an issue of great concern for the longterm reliability due to the stricter performance, thermal and power requirements. The problem of EM becomes even more pronounced in power grids due to the large unidirectional currents flowing in these structures. The attention for EM analysis during the past years has been drawn to accurate physics-based models describing the interplay between the electron wind force and the back stress force, in a single Partial Differential Equation (PDE) involving wire stress. In this paper, we present a fast semi-analytical approach for the solution of the stress PDE at discrete spatial points in multi-segment lines of power grids, which allows the analytical calculation of EM stress independently at any time in these lines. Our method exploits the specific form of the discrete stress coefficient matrix whose eigenvalues and eigenvectors are known beforehand. Thus, a closed-form equation can be constructed with almost linear time complexity without the need of time discretization. This closed-form equation can be subsequently used at any given time in transient stress analysis. Our experimental results, using the industrial IBM power grid benchmarks, demonstrate that our method has excellent accuracy compared to the industrial tool COMSOL while being orders of magnitude times faster.

2 citations

Posted Content
TL;DR: A new machine learning based fast power integrity classifier that quickly flags the EM/IR hotspots is proposed that is showing promising prediction accuracy.
Abstract: In this paper, we proposed a new machine learning based fast power integrity classifier that quickly flags the EM/IR hotspots. We discussed the features to extract to describe the power grid, cell power density, routing impact and controlled collapse chip connection (C4) bumps, etc. The continuous and discontinuous cases are identified and treated using different machine learning models. Nearest neighbors, random forest and neural network models are compared to select the best performance candidates. Experiments are run on open source benchmark, and result is showing promising prediction accuracy.

1 citations

Journal ArticleDOI
TL;DR: In this article, a wideband isolation topology of a power line using open stub structures for high-speed digital interconnects is proposed, and the induced power noise is reduced from 83 to 12 mV (86% reduction ratio).
Abstract: A wideband isolation topology of a power line is proposed, using open stub structures for high-speed digital interconnects. To reduce the coupled noise to the power line in the absence of a common-mode choke (CMC), which could degenerate signal integrity due to its loss and unbalanced properties, ferrite bead and open stub structures are utilised as they are suitable to the small size of commercial systems. In terms of the enhanced isolation characteristics, the induced power noise is reduced from 83 to 12 mV (86% reduction ratio) under a mobile high-definition link data transfer without data losses. Therefore, the proposed open stub structures are a very effective tool for both power integrity and signal integrity, and most importantly the cost is minimal when the CMC is removed from the high-speed digital interconnect.

1 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202312
202267
202139
202045
201965
201852