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Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.


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Proceedings ArticleDOI
30 Dec 2008
TL;DR: In this paper, a fast board-power-voltage fluctuation analysis system is presented to realize the chip-package-board co-design, which contributes to the increase of design efficiency in early product development stage followed by reducing the time loss due to the rework in the development process.
Abstract: This paper describes a fast board-power-voltage fluctuation analysis system to realize the chip-package-board co-design. As high-speed signal processing of semiconductor chips and high-density packaging technologies are progressed, circuit margins are reduced and the packaging design becomes difficult more and more. These difficulties often bring re-designs of board and package layouts. To reduce the time loss by the rework and increase design efficiency, short turn-around-time estimation techniques for analyzing the electrical performance integrating chip-package-board characteristics have been required. This system contributes to the increase of design efficiency in the early product development stage followed by reducing the time loss due to the rework in the development process.

1 citations

Proceedings ArticleDOI
20 Apr 2016
TL;DR: In this article, the authors focus on Signal Integrity (SI) and Power Integrity (PI) integration characteristic research and compare the effects of SSN generated from the Power Distribution Network (PDN) and the difference of transport channel quality for multiple signal paths on package.
Abstract: This paper focuses on Signal Integrity (SI) and Power Integrity (PI) integration characteristic research. The voltage fluctuation across the power supply of Integrity Circuit (IC) is called Simultaneous Switching Noise (SSN). The research emphasizes on the SSN generated from packages since the switching of I/O in chip. A CMOS inverter chip [1] is designed because of the simplicity of the model, the influence of packages and interconnects on signal quality can also be observed more clearly. It is utilized to evaluate and compare the effects of SSN generated from the Power Distribution Network (PDN) and the difference of transport channel quality for multiple signal paths on package. Besides, a well path design also has lower radiation for avoiding interfering chip. Make a radiation analysis of path designs. Finally, propose best and worst package designs.

1 citations

Journal ArticleDOI
TL;DR: In this paper, the power/ground plane impedance is transformed by Mobius transform and is more linear than the raw impedance, which ensures that a simple approximation is possible, which can be applied to the analysis and design of power and ground plane where complex computation is needed.
Abstract: A new method to reduce the computation time in power/ground-plane analysis is proposed. The proposed method is based on an approximation of impedance in the frequency domain using Mobius transform. The power/ground plane impedance is transformed by Mobius transform and is more linear than the raw impedance, which ensures that a simple approximation is possible. After the approximation, an inverse Mobius transform is applied to predict the power/ground plane impedance. This method displays the high speed of computing with good accuracy. In the case of impedance calculation for a 17.78 cm times 10.16 cm printed circuit board (PCB) board, the proposed method has shown to be 12 times faster than conventional methods. This method can be applied to the analysis and design of power/ground-plane where complex computation is needed.

1 citations

Book ChapterDOI
01 Jan 2012
TL;DR: A smart handheld device, which can resolve a lot of problems during data communication, synchronization, manipulation and flow control, and highly integrated design reduces the total cost of the traceability devices.
Abstract: The quality and safety of agricultural products is becoming more and more important nowadays. The devices commonly used are POS (Point of Sales) terminals, electronic scales, bar-code scanners, etc. The mismatches among various devices cause a lot of problems during data communication, synchronization, manipulation and flow control. Here a smart handheld device will be introduced, which can resolve these problems. Highly integrated design reduces the total cost of the traceability devices; an overall control makes the cooperation easy and guarantees the traceability flow more reliable and robust. The device hardware mainly consists of an ARM (Advanced RISC Machines) core, a power management block and some functional peripherals. The implementation of the device focused on four issues: 1. power circuit and power management design in multi-power system; 2. peripheral cooperation under CPU control; 3. signal integrity and power integrity in PCB design; 4. transaction model based software design and database synchronization.

1 citations

Patent
05 Apr 2016
TL;DR: In this paper, the authors proposed a test board which includes a main board which is combined with device under tests (DUTs) by sockets, comprises test signal paths which transmit test signals inputted from an external tester to each pin of the DUTs or transmit test result values to the tester, and a palm board which was combined with the main board and mounted a passive element connected to at least one among pins to improve power integrity or signal integrity in a test operation.
Abstract: To reduce manufacturing costs, a test board according to the present invention, includes: a main board which is combined with device under tests (DUTs) by sockets, comprises test signal paths which transmit test signals inputted from an external tester to each pin of the DUTs or transmit test result values to the tester; and a palm board which is combined with the main board and mounts a passive element connected to at least one among pins to improve power integrity or signal integrity in a test operation.

1 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202312
202267
202139
202045
201965
201852