Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.

Pre-silicon Noise to Timing Test Methodology

Abstract: This document provides a new pre-silicon PDN design methodology which validates the performance of the circuit design before it is approved for fabrication. It combines Signal and Power Integrity performance trades off of the General Purpose IO buffer. As the GPIO is built with a brand new silicon process, the method helps to define a new power integrity specification using the combined Signal and Power Integrity method, calculating on timing margins allowable. Traditionally, the power integrity solution metric is vastly defined by a hand-waving of +/-10% of nominal voltage.

Segmentation Method for Modeling Heterogeneous Components to Suppress Broadband Simultaneous Switching Noise on a Multilayer Structure

Abstract: Due to the rapid development of semiconductor manufacturing processes and 5G mobile system design, the need for high-speed digital electronic circuit miniaturization, high operating frequency, and high-speed transmission of data continues to increase. Electronic components are becoming smaller with faster operating speed. Fabricating a complete electronic circuit system with components from different manufacturers is likely to lead to unpredictable electromagnetic interference, signal integrity, power integrity, and other issues. Therefore, electromagnetic compatibility has become a key topic in the design of electronic circuits. We present a modeling approach that can be used to build the stopband and passband in a $Z$ -shape and the electromagnetic band gap (EBG) individually. In the model, the printed circuit board (PCB) is divided into five segments of different sizes, each of which has separate rectangular power and ground planes. Through the mushroom-type EBG, these structures are connected as part of a vertical blind hole; that is, the $Z$ -shaped power bus comprises a rectangular resonant cavity and transmission line. The proposed modeling method is proven to have accurate simulation, and it can be applied to complicated broadband structure for integrating the whole derivation process into computer programs. The proposed titanic broadband suppression structure can better suppress simultaneous switching noise (SSN) coupling ( $\le -30$ dB) within the range of 5 MHz–40 GHz.

Using Broadband Green's function method to model interconnects of traces and vias

Abstract: In this paper, the Broadband Green's function with low wavenumber extraction (BBGFL) is applied to modeling of traces connecting vias in printed circuit boards, particularly arbitrarily shaped power/ground planes. The proposed method is a hybrid technique based on mode decomposition: BBGFL is used to fast compute the vias in power/ground planes, method of moments (MoM) is used to calculate the impedance matrix of the traces, and then physical circuit model is applied to cascade the vias and traces in the power/ground planes. The present method is compared to MoM and commercial tool HFSS. Results show the present technique has good agreement with MoM and HFSS on the S-parameters, while is several hundred times faster than in CPU time for broadband simulations. It provides a fast technique for system level high-speed interconnect designs and applications.

Calculating electromagnetic coupling between isolated power islands by 2D-FDTD with equivalent circuits

Abstract: Two-dimensional finite difference time domain (2D-FDTD) method is a very powerful electromagnetic numerical method for simulating electromagnetic(EM) problems of a complicated printed circuit board (PCB). However, due to the lack of transversal components of electric field intensities, it is hard to contain the coupling effect among isolated power/ground islands. In order to simulated the EM performance of the whole PCB, a set of equivalent circuits between adjacent two edges of isolated islands are used to calculate the coupling. First, the scattering parameters (S-parameters) of multiple ports are obtained from measurement by network analyzer or simulation by full wave EM solver. Then, a mode extraction approach is applied to those S-parameters to obtain the coupling modes. Finally, a set of equivalent circuits can be obtained. Those circuits can be combined with 2D-FDTD method to calculate signal integrity (SI), and power integrity (PI) including coupling between isolated islands.

A novel flow to optimize package power distribution network design

Abstract: Power Integrity (PI) is an important topic in today's high-speed interface designs, and the power distribution network (PDN) is a major factor in the package design. This research we propose an effective design method for a multi-layer and complex package design. The first section of this paper is to perform the current density to fast find the bottleneck of draft design for the DDR core power and DDR IO power planes. Due to the poor ball assignment, the longer current path is detected from the current density map, and then to adjust the ball assignment to change the current density. The second section of the paper is modeling the package, including resistance, inductance parasitic and PDN impedance extractions based on the S-parameter simulation. From optimizing the package design and the chip-package co-simulation to analyze the SSN and dynamic power noise are estimated in Section III. Finally, conclusions are given.