Topic
Power integrity
About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.
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01 Jan 2014
TL;DR: In this article, the influence of many different parameters on the performance of RF and Microwave components for microwave frequency applications was extensively studied, including voltage standing wave ratio (VSWR) and power handling capability.
Abstract: Ever-rising pressure of improving frequency domain performance of RF and Microwave components to improve the signal integrity as well as to reduce component package size consistently challenge design engineers not only with signal integrity and size constraints, but also the power integrity and thermal constraints concurrently. To achieve excellent signal and power integrity performance for microwave frequency application, components need to have superior voltage standing wave ratio (VSWR) characteristics as well as outstanding power handling capability. Addition to the brilliant component performance, manufacturers need to achieve excellent fabrication yield performance to keep the project viable. Process engineers face many challenges on each fabrication steps, which could significantly degrade the fabrication yield. Few challenges could originate from material sets, while others could arise from the process variations. In this work, we extensively studied the influence of many different parameters that...
01 Aug 2022
TL;DR: In this article , a continued fraction-based algorithm is developed for the analytical characterization of decoupling capacitors in multilayered printed circuit stackups, which depends on modeling a stack of resonant cavities in the form of finite continued fractions.
Abstract: A continued fraction-based algorithm is developed for the analytical characterization of decoupling capacitors in multilayered printed circuit stackups. The proposed technique depends on modeling a stack of resonant cavities in the form of finite continued fractions. Mathematical models for a variety of configurations are developed including a capacitor and integrated circuit (IC) being (1) on the same side, (2) on the opposite sides and (3) on both sides of a printed circuit board (PCB). The frequency domain responses of the proposed models are observed in good agreement with data from numerical electromagnetic (EM) simulations, which validate the accuracy of the proposed algorithm. The developed models are intended for a quick and practical power integrity (PI) analysis of printed circuits with no limitation on the number of layers.
09 Nov 2022
TL;DR: In this article , a Sum-of-Squares (SOS) partial fraction passivity enforcement algorithm using simulated heterogeneous interconnect data is presented, where the authors demonstrate a Sum of Squares algorithm for signal and power integrity design.
Abstract: Implementation of next generation 2.5/3D technology for heterogeneous integration requires accurate physical models for signal and power integrity design. We demonstrate a Sum-of-Squares (SOS) partial fraction passivity enforcement algorithm using simulated heterogeneous interconnect data.
12 Dec 2022
TL;DR: In this article , the significance of power distribution network symmetry in a symmetric stack-up for two-sided component mounted PCBs like DIMM modules running at multi-Gbps speeds is discussed.
Abstract: In today’s high speed design space, speed is the main factor determining the performance of the product. Dual In-line memory modules (DIMM) designs for DDR5 are packed with many high-speed DRAMs with signal speeds high enough that stack-up of the printed circuit board (PCB) play a critical role in the overall DIMM performance. At speeds of 6400 Mbps, power integrity becomes as important as signal integrity. On a first order approximation, power integrity basically involves PCB stack-up and decoupling capacitors design. This paper covers significance of power distribution network (PDN) symmetry in a symmetric stack-up for two-sided component mounted PCBs like DIMM modules running at multi-Gbps speeds.
TL;DR: In this issue, I am pleased to recommend the work reported by Biyao Zhao and co-authors on the topic of modeling, analysis, and design of decoupling capacitors (decaps) in multi-layered PCBs.
Abstract: Welcome to the Signal Integrity and Power Integrity Column!, With great pleasure, I introduce to you a contribution by Biyao Zhao and co-authors about a systematic approach for Power Integrity (PI) analysis of power distribution networks (PDNs) in multi-layered printed circuit boards (PCBs). Power Integrity is an essential consideration for high-speed designs. Noise in PDNs due to poor designs may lead to malfunction or failure of high-speed circuit systems. One main objective of the PDN design is to achieve target impedance. For this purpose, various methodologies have been proposed in the literature to address the PI modeling and analysis of PDNs, many of which are already in commercial use.