Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.

Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs

Abstract: Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and power wire segments as single resistors, which cannot capture the detailed current distribution and may miss trouble spots associated with current crowding. This paper studies DC current crowding and its impact on 3D power integrity. First, we explore the current density distribution within a TSV and its power wire connections. Second, we build and validate effective TSV models for current density distributions. Finally, these models are integrated with global power wires for detailed chip-scale power grid analysis.

A new approach to power integrity with thinfilm capacitors in 3D IPAC functional module

Abstract: This paper presents a new active and passive integration concept called 3D IPAC (Integrated Actives and Passives) to address the power integrity in high-performance and multifunctional systems. The 3D IPAC consists of an ultra-thin glass module with through-vias and double-side integration of ultra-thin active and passive components to form functional modules. By integrating power ICs, storage capacitors and inductors, and high-frequency decoupling capacitors in ultra-thin (30-100 μm) glass substrates, 3D IPAC Voltage Regulator Module (3D IPAC VRM) provides a complete and ultra-miniaturized solution to power integrity. The ultra-thin 3D IPAC allows both actives and passives very close to each other and to the other active dies, resulting in improved performance over conventional SMDs and state-of-art IPDs for decoupling functions. The first part of the paper presents modeling results to show the benefits of the 3D IPAC module as a power integrity solution. The second part of the paper presents the fabrication and characterization of high-k thinfilm capacitors and etched aluminum film capacitors integrated on either sides of a through-via 3D IPAC glass substrate. This paper, therefore, demonstrates the integration of heterogeneous capacitors on a single ultra-thin glass substrate for the first time, and presents its benefits as a complete solution for power integrity.

Signal and Power Integrity Performances of Striplines in Presence of 2D EBG planes

Abstract: In this work the analysis of the signal and the power integrity performances of two different types of EBG structures in presence of single ended and differential striplines is proposed. The two EBG patterns have square patches and double L or meandered branches. The signal quality is measured in terms of the transmission parameter S21 and the eye pattern at the terminations; the power integrity is instead analyzed by means of the noise coefficient from the source to different positions along the planes.

Signal Integrity and Power Integrity Properties of FCBGA Based on Ultra-Thin, High-Density Packaging Substrate

Abstract: We developed an ultra-thin high-density packaging substrate, called an MLTS (multi-layer thin substrate), that consists only of build-up layers without a core laminate. We evaluated the signal integrity and power integrity properties of a flip-chip ball grid array (FCBGA) based on the MLTS, along with those of an identically functioning FCBGA based on conventional build-up printed wiring board (PWB). Our signal-integrity simulation clearly showed that the return loss (S11) of the MLTS was 6 dB smaller than that of the PWB in the frequency range from 1 to 10 GHz. In our power-integrity simulation, the noise transmitted inside the MLTS was 13 dB smaller than that inside the PWB at 10 GHz. These results indicate that the MLTS has considerable advantages over a conventional build-up PWB, especially for operation in the GHz range.