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Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.


Papers
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Proceedings ArticleDOI
01 Oct 2017
TL;DR: In this article, the authors present design considerations for grouping multiple loads to a common power plane and discuss power integrity aspects to address differing load excitations, noise sensitivities, and wide spatial distribution.
Abstract: This paper presents design considerations for grouping multiple loads to a common power plane. Power management & VR low load efficiency are covered briefly. The main focus is power integrity aspects to address differing load excitations, noise sensitivities, and wide spatial distribution. Design guidelines are illustrated with an example supported by simulation and experimental data.

3 citations

Proceedings ArticleDOI
27 May 2008
TL;DR: In this article, a 2D finite-different time domain (2D FDTD) method is presented for efficient power integrity and EMI analysis of high-speed electronic packages, which is mainly focused on the radiation due to the edge effect of the parallel plate structure in a package.
Abstract: A two-dimensional full-wave method is presented in this paper for efficient power integrity and EMI Analysis of highspeed electronic packages. The power/ground planes in electronic packages form a parallel-plate structure, which is solved by a 2D finite-different time domain (2D FDTD) method. Both the conductor loss and the substrate loss are modeled by the 2D method. Besides the parallel-plate structure, electronic packages also comprise of many transmission lines including microstrip- and stripline-type structures. Those two types of structures are also resolved by the 2D method. So a unified solver may be developed in the context of 2D method for the signal and power integrity analysis of electronic packages. The electromagnetic interference (EMI) issue of electronic packages is also touched in this paper, which is mainly focused on the radiation due to the edge effect of the parallel plate structure in a package. Numerical examples are given to demonstrate the method.

3 citations

Proceedings ArticleDOI
01 Aug 2013
TL;DR: In this article, a modeling method considering all the significant effects from the chip, package, and board levels is developed to identify and investigate the critical nets affecting the signal or power integrity (SI/PI).
Abstract: Under the platform of a high-speed package system, a modeling method considering all the significant effects from the chip, package, and board levels is developed to identify and investigate the critical nets affecting the signal or power integrity(SI/PI). For SI issues, accurate modelings for signal channel are verified by system of high speed line. The following what-if analyses help to identify the package trace's bottlenecks and have great effects on signal transmission. For PI part, the modeling methodologies for power distribution networks of data line are demonstrated and validated with the results of frequency domain simulation. Lastly, with the co-simulations by chip-package-PCB model, the paper was talked about the SI and PI problem using SI-PI co-analysis methodology. The analysis results indicates that the parasitic effects of the high speed package system are the most critical, depicting the importance of improved package design in the next high speed package system.

3 citations

Journal ArticleDOI
TL;DR: In this paper, an approach for power integrity analysis on multi-layer printed circuit boards is presented, where inductance decomposition is applied to identify the critical parameters that can influence the PDN input impedance.
Abstract: An approach is presented for power integrity analysis on multi-layer printed circuit boards in this paper. Two critical current paths are analyzed. Inductance decomposition is applied to identify the critical parameters that can influence the PDN input impedance. Two types of stack-ups are used to perform sensitivity analysis to illustrate the effectiveness of PDN design guidelines. Based on the analysis of the inductance contribution from different blocks in the PCB PDN, a systematic approach to obtain a complete understanding of PDN behavior is proposed. The approach can be used to provide design guidance in PDN design practice.

3 citations

Proceedings ArticleDOI
01 Aug 2016
TL;DR: In this article, a planar electromagnetic band-gap (EBG) structure is proposed to suppress simultaneous switching noise in low frequency range and expand the stop-band bandwidth, which is achieved by increasing the connection bridge between the patches.
Abstract: Simultaneous switching noise is the main reason that greatly affects power integrity of power distribution network. In order to suppress simultaneous switching noise in low frequency range and expand the stop-band bandwidth, we propose a new type planar electromagnetic band-gap (EBG) structure which is achieved by increasing the connection bridge between the patches. It can be directly embedded in high-speed circuit PCB. When the suppression depth is −30dB, the stop-band is 0.29–7.21GHz. The proposed electromagnetic band-gap structure can effectively decrease the lower cutoff frequency and expand the stop-band bandwidth which is confirmed by simulation.

3 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202312
202267
202139
202045
201965
201852