Power integrity

About: Power integrity is a research topic. Over the lifetime, 983 publications have been published within this topic receiving 6867 citations.

A Comparative Study of On-Chip CMOS S&H Voltage Sensors for Power Integrity: SOI vs. Bulk

Abstract: This paper evaluates the performance of two on-chip sample & hold (S&H) voltage sensors, usable for power integrity measurements, with the aim to compare silicon-on-insulator (SOI) & bulk CMOS technologies. Both sensors were designed and simulated in 180 nm 5 V AMS-bulk and XFAB-SOI processes, using optimized parameters and compatible devices. The fundamental variables analyzed were power consumption, leakage current, slew rate (SR), and transient output voltage, under process, voltage and temperature variations. Compared to bulk technology, SOI was found to have lower power consumption (by 2.2 mW in average) and leakage supply current (by 9.5 pA at 27○C), higher sensitivity to process variations (up to 88% additional slew rate versus 39% at 80○C), higher resilience to temperature changes (6% in output voltage), and a larger occupied area. The SOI sensor is intended to be fabricated and used to evaluate injected continuous wave and transient disturbances as well as voltage fluctuations due to internal activity on power distribution networks.

Power integrity analysis for solid state drive PCB

Abstract: Today in high-speed digital design, system-level Power Integrity (PI) analysis has become inevitable due to ever increasing data rates for both serial I/O interface and memory interface. The present trend in high-speed digital circuits is increasing speed and density, thereby consuming more current and operating at lower supply voltages. The increase in switching speed and total current consumption combined with lower supply voltages has decreased the noise margin making the components more susceptible to power supply noise. The objective of Power integrity analysis is to provide a stable DC voltage within the specified voltage ripple limits across the frequencies of interest. In this paper post layout power integrity simulation for Solid State Drive PCB using Mentor Graphics Hyperlynx PI simulation tool is discussed.

Signal-power integrity and EMI analysis for singlechip and multi-chip-module applications

Abstract: In this paper, a global Chip-Package-PCB Co-Design and Co-Verification methodology is successfully applied to Single-Chip Down-converter circuit and Multi-Chip-Module in transmit mode. Full-wave electromagnetic and thermal Co-Analysis approach is adopted to investigate impact of critical RF couplings, power dissipation and grounding strategies on systemlevel performances. The Single-Chip down-converter circuit shows 43dB conversion gain, with 6.5dB noise figure and output IP3 of 18dBm. The MCM design demonstrates 35dBm output IP3, 25dBm output CP1, with 45dB image rejection with 25dB voltage gain for a dissipated power of 2.2W.

Experimental Assessment of Stochastic Signals Through the Power Density Method

Abstract: The presented methodology allows for the analysis of stochastic signals using an automated near-field measurement system and real-time signal analyzer. In the method below, power density spectra were used to determine random signals once measurement techniques for the near field have been employed to capture stochastic signals. Traditional methods for measurement within the near field identify either the electric (E) or magnetic (H) distributions and, depending on the processing capability of the analyzer used, a description of the time variant signal. It has been observed during the analysis of the measured complex signals that neither the H nor E field distributions have a direct relation to the stochastic field location; as such, a mathematical formula has to be applied to calculate the power density value and position. In the provided method, it is essential that both E and H fields be independently measured in the near field so that the complete complex signal be acquired. Once both fields have been quantified over the same time period and superposition is resolved, the true phase angle can be determined. From the resulting data a Poynting vector can be calculated and post processing algorithms applied to determine the stochastic signals' physical location and power density value. This technique can, through a backscatter analysis, determine if any signal returns to the source, so as to assess if there are any impacts on Signal Integrity or Power Integrity.

Power integrity challenges of re-designing a mobile SoC with fully integrated voltage regulator to IoT applications

Abstract: The demand for connected smart cars has grown exponentially in the past few years. To meet consumer's digital lifestyle needs and take part in this emerging market, microprocessor companies, such as Intel®, are shifting a focus to automotive SoC package designs. This paper examines the differences in design specifications between automotive and mobile and the implications to Power Integrity. The automotive use case, temperature cycling, and reliability qualifications are more stringent and add to the Power Integrity challenges. Frequency and time domain simulations were performed for all Fully Integrated Voltage Regulator (FIVR) and non-FIVR rails and compared between automotive vs. mobile.