scispace - formally typeset
Search or ask a question

Showing papers on "PowerPC published in 1990"


Journal ArticleDOI
TL;DR: A highly concurrent superscalar second-generation family of RISC workstations and servers is described and the hardware implementation takes advantage of this powerful RISC architecture and employs sophisticated design techniques to achieve a short cycle time and a low cycles-per-instruction (CPI) ratio.
Abstract: A highly concurrent superscalar second-generation family of RISC workstations and servers is described. The RISC System/6000 family is based on the new IBM POWER (performance optimization with enhanced RISC) architecture; the hardware implementation takes advantage of this powerful RISC architecture and employs sophisticated design techniques to achieve a short cycle time and a low cycles-per-instruction (CPI) ratio. The RS/6000 CPU features multiple-instruction dispatch, multiple functional units that operate concurrently, separate instruction and data caches, and zero-cycle branches. In this superscalar implementation, at a given cycle the equivalent of five operations can be executed simultaneously ( a branch, a condition-register operation, and a floating-point multiply-add).

71 citations


Journal ArticleDOI
Randy Rd. Groves1, Richard R. Oehler1
TL;DR: A second-generation RISC architecture, the POWER architecture, is described, which is based on subsequent research by the original 801 team and is used in the recently announced RISC System/6000.

19 citations