PowerPC

About: PowerPC is a research topic. Over the lifetime, 1184 publications have been published within this topic receiving 22297 citations. The topic is also known as: ppc.

PowerPC processor based performance monitoring method

Abstract: The invention belongs to the field of computer software and relates to the field of performance evaluation, in particular to a PowerPC processor based performance monitoring method. The method comprises the following steps: 1) constructing a graphic configuration tool and a performance monitoring module; 2) making a performance monitoring scheme, wherein the performance monitoring scheme comprises a software object required to be monitored, an event required to be monitored, and a monitoring triggering mode; 3) generating a configuration data file by utilizing the graphic configuration tool through the made performance monitoring scheme; 4) loading the configuration data file to a target machine; and 5) running the target machine to obtain performance monitoring data. With the method, few system resources are consumed and processor-level performance data unavailable for conventional testing and evaluation can be obtained.

Optimizing Simulation in Multiprocessor Platforms Using Dynamic-Compiled Simulation

Abstract: Contemporary SoC design involves the proper selection of cores from a reference platform. Such selection implies the design exploration of CPUs, which requires simulation platforms with high performance and flexibility. Applying retarget able instruction-set simulation tools in this environment can simplify the design of new architectures. The increasing system complexity makes the traditional approach to simulation inefficient for today's architectures. The dynamic-compiled instruction-set simulation compiles application code blocks, at runtime, to accelerate the simulation with high efficiency. This paper presents a retarget able dynamic-compiled simulator to improve the performance in multiprocessor platforms. Three architectures were modeled a#x2013; MIPS, SPARC and PowerPC a#x2013; and tested in platforms with 1, 2, 4 and 8 processors. The performance on platforms with dynamic-compiled simulators was 3 times better than interpreted simulators, using large programs. Dynamic-compiled simulators outside the platforms with single core programs reached the 139 Million Instructions per Seconds on average.

A Robust Flip-Flop for Industrial Applications

Abstract: Flip-flops are the basic building blocks of any sequential circuits which occupy the maximum area in a circuit. So the robustness of the system greatly depends on the reliable operation of the flip-flop. In this work the PowerPC 603 flip-flop is simulated and analyzed to measure its reliability against variations in supply voltage and temperature. Performance analysis has been made by having Power, Delay and PDP as Figures of Merit. The acquired simulation results revealed the different sources of power consumption in different scenarios. The simulated results using finer technologies with Synopsys HSPICE prove that PowerPC 603 is a resilient flip-flop for all corners.

Modelling HW/SW Co-Designed Processors

Abstract: This paper presents DARCO, an extensible platform for modelling HW/SW co-designed processors with different guest and host ISAs. Its Emulation Software Layer (ESL) provides staged compilation, which translates and optimizes x86 binaries to run on a PowerPC processor. In addition to the functional models, DARCO provides timing simulators and a powerful debugging toolchain. DARCO has a functional emulation speed of 8 million x86 instructions per second.

Computer processing integrated circuit board

Abstract: The utility model discloses a computer processing integrated circuit board, including POWERPC treater, programmable logic device, temperature sensor, real -time clock, LED module, ether net gape, guang kou, ethernet transceiver, SRIO interface and non -volatile flash memory, memory, temperature sensor, real -time clock, electricity are connected respectively to the POWERPC treater can wipe programmable ROM, ethernet transceiver, serial ports, SRIO interface, PCLe converter and programmable logic device The utility model discloses computer processing integrated circuit board has following advantage: 1, use 1 48 way PCIE 20 switch chip 2, support vxWorks 68 more than or, fully provided radar, video image handle, crucial real -time among the intelligent signal processing 3, superstrong environmental suitability, operating temperature: - 40 DEG C ~+ 85 DEG C Adapt to the application under national defence military project and the aviation field adverse circumstances