PowerPC

About: PowerPC is a research topic. Over the lifetime, 1184 publications have been published within this topic receiving 22297 citations. The topic is also known as: ppc.

Highly parallel image processing on the STI Cell

Abstract: Massively deployed inside Sony PS3 platforms, the STI Cell Broadband Engine is a multi-core processor with a PowerPC host processor (PPE) and 8 synergic processor engines (SPEs). In this paper, we describe three image processing applications which we implemented on the Cell BE. We report the performance measured on one Cell blade with varying numbers of synergic processor engines enabled, and with varying application parameters. These results were compared to the results obtained on the Cell BE running a single PPE and with all 8 SPEs disabled. The results reveal the superior performance of image processing and SIMD-prone applications on the 9-core Cell BE processor over conventional RISC processors.

A MPI Parallel Programming Model for CBEA Based on Hybrid Memory Access Technology

Abstract: Most programming models for CBEA(Cell Broadband Engine Architecture) well support bulk data transfer application which is suitable for stream processing,but the applications whose memory access patterns are irregular or unpredictable can not be supported or suffer performance degradation.This paper proposes a MPI programming model and corresponding runtime library to support both streaming and irregular applications.The MPI communication was assigned on PPE(PowerPC Processing Element) side to broaden the applicable field of the model.Moreover,a runtime memory access profiling infrastructure under uniform access interface was adopted in the model to help programmer to select proper memory access method and optimize data transfer between different memory hierarchies.The experimental results show that,besides getting high speedup ratio and supporting various memory methods,the application based on proposed parallel programming model performs about 30%~50% better than that based on related technologies.

Implementation of system with PCI interface on chip based on FPGA

Abstract: This paper introduced a method of implementing SOC based on PowerPC core in Xilinx's FPGA,and build the system by the Xilinx EDK(embedded development kit),and achieved the communication between the PowerPC and the host through an OPB-PCI bridgeThe result indicat that this method can be implements simply and work reliablyIt can process the data and extend the system easily and flexiblyIt shows the convincible potential in the fields of high speed communication and data processing on chip

Performance tradeoffs in sequencer design on a new G4 PowerPC/sup TM/ microprocessor

Abstract: The microprocessor discussed in this paper is a new member of the G4 family of PowerPC microprocessors with AltiVec/sup TM/ enhanced technology, intended for high performance desktop systems. This four-way superscalar design is more deeply pipelined than previous designs in order to achieve greater frequency. The challenge in increasing frequency is to translate most or all of that increase into performance increases, and this requires careful analysis from a performance simulator. This paper specifically looks at how the interaction between frequency and performance goals affected the design of the new G4 instruction sequencer.

Display terminal design for heavy-duty engineering vehicle using embedded rapid customized technology

Abstract: With the widespread use of heavy-duty engineering vehicles, the need of display terminal for the vehicle increases rapidly. Because of the special functional requirements, it is very difficult to design the display terminal for developers. At the same time, the cost of designing display terminal is very expensive. It is significant that the customizable display terminal can be rapidly designed. In this paper, a method of CAN bus display terminal design for heavy-duty engineering vehicle is presented. Embedded rapid customized technology is employed in the design process. Also the custom embedded development platform and the application software for the display terminal were designed. The embedded development platform includes hardware components such as CAN bus interface, PowerPC processor and CoDeSys programming environment. Based on the platform, the application software is designed to transmit data on CAN bus and record the running state of vehicle. The developed program is used for the purpose of real-time state parameters transmission and storage, dynamic graphical display, modification of the interactive system. The application practice result shows that rapid customization design technology is valid for heavy-duty engineer vehicle design application, and improvement for the design of embedded display terminal is discussed based on the effect of practical application.