PowerPC

About: PowerPC is a research topic. Over the lifetime, 1184 publications have been published within this topic receiving 22297 citations. The topic is also known as: ppc.

PDVDS: A Pattern-Driven Software Vulnerability Detection System

Abstract: The automatic detection of security vulnerabilities in binary program is challenging and lacks efficient tools. Current research and tools are mostly restricted to a specific platform and environment, which induces the trouble to detect all kinds of vulnerabilities with unified approach. Moreover, Existing methods need many manual operations and rely on the experience of researchers. This paper presents a cross-platform system for automatically software vulnerability detection based on uniform intermediate representation. It supports many platforms, including x86, PowerPC and ARM. The system lifts underlying instructions to intermediate representation from several platforms. Platform-independent analysis method is implemented based on intermediate representation by static analysis. It also uses a vulnerability pattern driver extracted from experience and knowledge to drive the automatic vulnerability detection during the analysis. The system called PDVDS has been realized. We have evaluated its effectiveness through validating many known vulnerabilities and detecting three zero-day vulnerabilities.

Network data package filtering method based on Power PC hardware frame

Abstract: The invention discloses a network data package filtering method based on Power PC hardware frame and belongs to the technical field of network data package filtering. The method mainly solves the problems of poor efficiency, proneness to system crash, inconvenient filtering strategy loading and inconvenient debugging. The technical scheme is that the Power PC hardware frame adopts a PowerPC multi-core network processor, and the Power PC multi-core network processor adopts a DPAA technology. The method includes the following steps: acquiring a network data package in the user space of an operation system; filtering the network data package according to a filtering matching list. A management user can conduct configuration modification on the content of a filtering matching list through a filtering rule configuration module, and timeliness of the filtering matching content is ensured.

Bridge connection device based on FPGA

Abstract: The invention discloses a bridge connection device based on an FPGA. The FPGA receives data of two high-speed serial LVDS transmission circuits, competes classified storage of the data and transmits the data to a PowerPC processor through various kinds of communication interfaces, and the PowerPC processor is responsible for management and analysis of various classes of data. According to the bridge connection device, the flexible programming feature of an FPGA technology is fully utilized, the powerful data communication and data processing capabilities of the PowerPC processor and the advantages of low power consumption, low bit error rate, low crosstalk, low radiation and the like of the LVDS high-speed serial interfaces are combined, according to different data types, the storage spaces are reasonably allocated, appropriate data interaction interfaces are selected, efficient processing and stable transmission of the data with bandwidth up to 800 Mbps are ensured, and the stabilityand robustness of a system are effectively improved.

De-RISC: A Complete RISC-V Based Space-Grade Platform

Abstract: The H2020 EIC-FTI De-RISC project develops a RISC-V space-grade platform to jointly respond to several emerging, as well as longstanding needs in the space domain such as: (1) higher performance than that of monocore and basic multicore space-grade processors in the market; (2) access to an increasingly rich software ecosystem rather than sticking to the slowly fading SPARC and PowerPC-based ones; (3) freedom (or drastic reduction) of export and license restrictions imposed by commercial ISAs such as Arm; and (4) improved support for the design and validation of safety-related real-time applications, (5) being the platform with software qualified and hardware designed per established space industry standards. De-RISC partners have set up the different layers of the platform during the first phases of the project. However, they have recently boosted integration and assessment activities. This paper introduces the De-RISC space platform, presents recent progress such as enabling virtualization and software qualification, new MPSoC features, and use case deployment and evaluation, including a comparison against other commercial platforms. Finally, this paper introduces the ongoing activities that will lead to the hardware and fully qualified software platform at TRL8 on FPGA by September 2022.

Managing a Real-time Embedded Linux Platform with Buildroot

Abstract: Developers of real-time embedded software often need to build the operating system, kernel, tools and supporting applications from source to work with the differences in their hardware configuration. The first attempts to introduce Linux-based real-time embedded systems into the Fermilab accelerator controls system used this approach but it was found to be time-consuming, difficult to maintain and difficult to adapt to different hardware configurations. Buildroot is an open source build system with a menu-driven configuration tool (similar to the Linux kernel build system) that automates this process. A customized Buildroot [1] system has been developed for use in the Fermilab accelerator controls system that includes several hardware configuration profiles (including Intel, ARM and PowerPC) and packages for Fermilab support software. A bootable image file is produced containing the Linux kernel, shell and supporting software suite that varies from 3 to 20 megabytes large – ideal for network booting. The result is a platform that is easier to maintain and deploy in diverse hardware configurations