Showing papers on "Precision rectifier published in 2019"

TIGER: A front-end ASIC for timing and energy measurements with radiation detectors

Abstract: A mixed-signal ASIC for timing and energy measurements with radiation detectors is described. The chip embeds 64 channels, each of which features a charge-sensitive amplifier followed by a dual-shaper coupled to low-offset discriminators. A versatile back-end, incorporating low-power Time to Digital Converters and Wilkinson Analog to Digital Converters with derandomizing buffers allows to encode both the time of arrival and the charge of the input signal. The ASIC is designed for a maximum detector capacitance of 100 pF and an event rate in excess of 60 kHz per channel. A peak detector samples the input signal with an excellent linearity in the range 5 ÷ 55 fC. Charge digitization with Time-over-Threshold is also supported to extend the dynamic range. Fabricated in a 110 nm CMOS process, the chip dissipates 10 mW/channel. The ASIC was primarily developed to readout the cylindrical GEM detector of the BESIII experiment. For its characteristics it can serve however a broad class of radiation sensors, including silicon microstrip detectors.

Realization of ASK/BPSK Modulators and Precision Full-Wave Rectifier using DXCCII

Abstract: This paper introduces two new circuits which are capable of realizing digital modulation schemes namely, amplitude shift keying (ASK) and binary phase shift keying (BPSK). First circuit named as ASK/BPSK modulator-1 employs one dual-X second generation current conveyor (DXCCII), three MOS switches and three resistors. On the other hand, second circuit named as ASK/BPSK modulator-2 comprises one DXCCII, three MOS switches and one grounded resistor. Both ASK and BPSK schemes are simultaneously realizable with both proposed circuits. In communication systems, both ASK and BPSK schemes are commonly used. Furthermore, a little modification in ASK/BPSK modulator-1 enables the realization of full-wave precision rectifier. The circuit of rectifier comprises one DXCCII, two resistors and two MOS switches. The non-ideal considerations of proposed circuits including non-ideal transfer gains as well as parasitic of DXCCII are also explored. HSPICE simulation results using 0.13 µm process parameters of IBM CMOS technology are given to validate proposed circuits.

A High-Voltage Energy-Harvesting Interface for Irregular Kinetic Energy Harvesting in IoT Systems with 1365% Improvement Using All-NMOS Power Switches and Ultra-low Quiescent Current Controller

Abstract: An energy-harvesting interface for kinetic energy harvesting from high-voltage piezoelectric and triboelectric generators is proposed in this paper. Unlike the conventional kinetic energy-harvesting interfaces optimized for continuous sinusoidal input, the proposed harvesting interface can efficiently handle irregular and random high voltage energy inputs. An N-type mosfet (NMOS)-only power stage design is introduced to simplify power switch drivers and minimize conduction loss. Controller active mode power is also reduced by introducing a new voltage peak detector. For efficient operation with potentially long intervals between random kinetic energy inputs, standby power consumption is minimized by monitoring the input with a 43 pW wake-up controller and power-gating all other circuits during the standby intervals. The proposed harvesting interface can harvest energy from a wide range of energy inputs, 10 s of nJ to 10 s of µJ energy/pulse, with an input voltage range of 5–200 V and an output range of 2.4–4 V under discontinuous as well as continuous excitation. The proposed interface is examined in two scenarios, with integrated power stage devices (maximum input 45 V) and with discrete power stage devices (maximum input 200 V), and the harvesting efficiency is improved by up to 600% and 1350%, respectively, compared to the case when harvesting is performed with a full bridge rectifier.

A CMOS Front-End for Timing and Charge Readout of Silicon Photomultipliers

Abstract: The present work describes a new channel architecture suited to reading out Silicon Photomultipliers (SiPM). The aim is to develop a multichannel Application-Specific Integrated Circuit (ASIC) in a standard CMOS 130 nm technology that achieves excellent timing accuracy while fully exploiting the dynamic range of large area SiPMs. The sensor is AC-coupled to the differential front-end, which features two separated timing and charge signal processing paths. The first one exploits a differential input current-mode preamplifier and an embedded Time-to-Digital Converter (TDC) that exhibits a 10 ps binning. Accurate timing and low jitter are also attained by means of a high-speed discriminator with threshold adjustable in small steps just above the baseline, which operates on the very steep edge of the output signal produced by the preamplifier. The charge measurement signal path is based on an active-RC integrator, a peak detector and an Analog-to-Digital Converter (ADC). Operating the front-end at 1.2 V supply voltage, with a power consumption of 10 mW, a simulated Single-Photon Time Resolution (SPTR) of 78 ps at Full-Width Half Maximum (FWHM) is achieved, linearly covering an input dynamic range of 1280 pC that corresponds to ~ 8000 photoelectrons with a SiPM gain of ~ 106.

Mixed-signal full-wave precision rectifier

Abstract: Apparatus and methods are described for providing a mixed-signal full-wave precision rectifier In one example of the disclosed technology, a full-wave rectifier circuit includes a comparator configured to output a logic 1 or logic 0 by comparing an analog input signal to a reference voltage The circuit further includes an analog switch with a control input coupled to the comparator output A first input of the analog switch is coupled to the analog electrical input and a second input of the analog switch is coupled to a reference input voltage The switch thus selects the input signal or the reference signal to output based on the output of the comparator An amplifier is coupled to receive the analog switch output and generate a signal following the input in an inverting or a non-inverting mode depending on the selected analog switch output, thereby generating a rectified full-wave output of the analog input signal

Design and Implementation of Voltage Peak Detection Based on Fourier Analysis

Abstract: In order to measure the peak value of the sinusoidal wave more conveniently, we did a full-wave rectification to the sinusoidal wave, then analyzed its frequency spectrum by using Fourier analysis. By researching the relationship between the DC component in the spectrum and the peak voltage, this paper provided a voltage peak value detect circuit based on the Fourier analysis. The detect circuit is including precision full wave rectifier circuit, second-order RC filter circuit and an ADC converter. Also this paper gives a technique based on the regression analysis in order to reduce the error due to the nonlinear characteristics and the manufacture errors between the real components. By doing the regression analysis of the raw data, which using MATLAB, the circuit will allow measuring error within 2%. Keywords—fourier analysis, DC component, precision rectifier, regression analysis

RF peak detection method using a sequential baseband scheme

Abstract: Systems, devices, and techniques for performing peak detection are described. A described receiver includes a first amplifier to amplify an input signal to generate a first amplified signal; a mixer to downconvert the first amplified signal to generate a downconverted signal; a second amplifier to amplify the downconverted signal to generate a second amplified signal; a filter, being selectably engageable by the receiver, a peak detector configured to perform voltage measurements of the second amplified signal; and switch circuitry. The switch circuitry is configured to selectably disengage the filter during a first measurement phase during which a first voltage measurement performed by the peak detector is indicative of an output voltage swing of the first amplifier, and to selectably engage the filter during a second measurement phase during which a second voltage measurement performed by the peak detector is indicative of an output voltage swing of the second amplifier.

Three-phase alternating-voltage high-precision fast detection circuit based on transformer

Abstract: The invention belongs to the industrial measurement and control field, relates to a three-phase alternating-voltage high-precision fast detection circuit based on a transformer and is suitable for allkinds of application occasions where high-precision real-time monitoring and control are performed on an effective value of a three-phase alternating voltage. The circuit includes a three-phase voltage transformer VS1, an A-phase positive operational amplifier IC1, a B-phase positive operational amplifier IC2, a C-phase positive operational amplifier IC3, an A-phase negative operational amplifierIC4, a B-phase negative operational amplifier IC5, a C-phase negative operational amplifier IC6, an output operational amplifier IC7, an A-phase positive diode D1, a B-phase positive diode D2, a C-phase positive diode D3, an A-phase negative diode D4, a B-phase negative diode D5, a C-phase negative diode D6 and the like. The circuit consists of a three-phase bridge-type super diode rectifying circuit and an alternating voltage signal processing circuit, and can detect an effective value signal of the three-phase alternating voltage in high precision, wide range and real-time modes. The circuit is simple, has low cost, high reliability and good versatility, and is easy to form productization.

A Novel Li-ion Battery Equalizer Circuit Design Based on LC Resonant Tank

Abstract: A novel Li-ion battery string equalizer based on LC resonant tank is designed. The circuit includes switched control module, LC resonant tank and voltage peak detecting module. By detecting the voltage peak position of the capacitor in the LC resonant tank, the equalizer circuit successfully switches batteries near the zero-current point to improve the equalization efficiency. The equalizer circuit is verified by Matlab/Simulink simulation and experiment. The simulation and experimental results shows that the proposed circuit can be applied for battery equalization.

Peak detector circuit

Abstract: A peak detector circuit includes a first capacitor coupled to an inverter and a first switch in parallel with the inverter. An input of the inverter couples to second and third switches. The second switch couples to an input voltage node. The third switch couples to an output voltage node of the peak detector circuit. The peak detector circuit includes a second capacitor coupled to the third switch and a third capacitor coupled to the second capacitor by way of a fourth switch. The third capacitor couples via a fifth switch to a power supply voltage node or a ground. A periodic control signal causes the first, second, and third switches to repeatedly open and close and a second control signal causes the fourth and fifth switches to open and close to adjust an output voltage on the output voltage node towards an input voltage on the input voltage node.