Showing papers on "Precision Time Protocol published in 2013"

A New IED With PMU Functionalities for Electrical Substations

Abstract: This paper proposes a new distributed architecture to measure synchrophasors in power substations, inspired by the standards IEC 61850 The new scheme is implemented in the process bus, where a high performance merging unit (MU), synchronized by precision time protocol (PTP), according to the standard IEEE 1588-2008, sends the sampled values (SVs) to an intelligent electronic device (IED) enabled to behave as a phasor measurement unit (PMU) The synchrophasors are evaluated in the IED through an algorithm based on the Taylor Fourier Transform and suitably modified to have high performance also in terms of response time in presence of step change conditions Different tests and considerations are presented to evaluate the various elements of uncertainty that a distributed architecture can introduce and, finally, to ensure the feasibility of the proposed approach

System level tests of transformer differential protection using an IEC 61850 process bus

Abstract: The IEC 61850 family of standards for substation communication systems were released in the early 2000s, and include IEC 61850-8-1 and IEC 61850-9-2 that enable Ethernet to be used for process-level connections between transmission substation switchyards and control rooms. This paper presents an investigation of process bus protection performance, as the in-service behavior of multi-function process buses is largely unknown. An experimental approach was adopted that used a Real Time Digital Simulator and 'live' substation automation devices. The effect of sampling synchronization error and network traffic on transformer differential protection performance was assessed and compared to conventional hard-wired connections. Ethernet was used for all sampled value measurements, circuit breaker tripping, transformer tap-changer position reports and Precision Time Protocol synchronization of sampled value merging unit sampling. Test results showed that the protection relay under investigation operated correctly with process bus network traffic approaching 100% capacity. The protection system was not adversely affected by synchronizing errors significantly larger than the standards permit, suggesting these requirements may be overly conservative. This 'closed loop' approach, using substation automation hardware, validated the operation of protection relays under extreme conditions. Digital connections using a single shared Ethernet network outperformed conventional hard-wired solutions.

Method and devices for time and frequency synchronization using a phase locked loop

Abstract: This invention relates to methods and devices for time and frequency synchronization, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a digital phase locked loop (DPLL) based on direct digital synthesis to provide both time and frequency signals for use at the slave (time client). An example of this DPLL in conjunction with a recursive least squares mechanism for clock offset and skew estimation is also provided.

Performance Analysis of PTP Components for IEC 61850 Process Bus Applications

Abstract: New substation automation applications, such as sampled value (SV) process buses and synchrophasors, require a sampling accuracy of 1 μs or better. The Precision Time Protocol (PTP), IEEE Std. 1588, achieves this level of performance and integrates well into Ethernet-based substation networks. This paper takes a systematic approach to the performance evaluation of commercially available PTP devices (grandmaster, slave, transparent, and boundary clocks) from a variety of manufacturers. The “error budget” is set by the performance requirements of each application. The “expenditure” of this error budget by each component is valuable information for a system designer. The component information is used to design a synchronization system that meets the overall functional requirements. The quantitative performance data presented show that this testing is effective and informative. Results from testing PTP performance in the presence of SV process bus traffic demonstrate the benefit of a “bottom-up” component testing approach combined with “top-down” system verification tests. A test method that uses a precision Ethernet capture card, rather than dedicated PTP test sets, to determine the correction field error of transparent clocks is presented. This test is particularly relevant for highly loaded Ethernet networks with stringent timing requirements. The methods presented can be used for development purposes by manufacturers or by system integrators for acceptance testing. An SV process bus was used as the test application for the systematic approach described in this paper. The test approach was applied, components were selected, and the system performance was verified to meet the application's requirements. Systematic testing, as presented in this paper, is applicable to a range of industries that use, rather than develop, PTP for time transfer.

Method and devices for synchronization

Abstract: This invention relates to methods and devices for time and frequency synchronization The invention has particular application where time and frequency synchronization over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP) is being carried out The primary challenge in clock distribution over packet networks is the variable transit delays experienced by timing packets, packet delay variations (PDVs) Embodiments of the invention provide a method for time offset alignment with PDV compensation where a synchronized frequency signal is available at a slave device via Synchronous Ethernet and is used to determine the compensation parameters for the PDV

Method and devices for synchronization using linear programming

Abstract: This invention relates to methods and devices for synchronization using linear programming, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a two-dimensional linear programming technique for estimating clock offset and skew, particularly from two-way exchange of timing messages between a master and a slave device. Some embodiments include a skew and offset adjustable free-running counter for regenerating the master time and frequency at the slave device.

Method and devices for compensating for path asymmetry

Abstract: This invention relates to methods and devices for compensating for path asymmetry, particularly with reference to time and frequency synchronization. The invention has particular application where time and frequency synchronization over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP) is being carried out. Typically communication path delays between a time server (master) and a client (slave) are estimated using the assumption that the forward delay on the path is the same as the reverse delay. As a result, differences between these delays (delay asymmetries) can cause errors in the estimation of the offset of the slave clock from that of the master. Embodiments of the invention provide techniques and devices for compensating for path delay asymmetries that arise when timing protocol messages experience dissimilar queuing delays in the forward and reverse paths.

White Rabbit: Sub-nanosecond timing over Ethernet

Abstract: The White Rabbit (WR) project is a multi-laboratory, multi-company effort to bring the best of the data transfer and the timing world together in a completely open design. WR is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. The aim is to enable the synchronization of a large number of nodes with sub-nanosecond accuracy and picosecond jitter over long lengths of fibre. The key technologies used are physical layer syntonization (clock recovery) and the Precision Time Protocol (IEEE 1588). WR generates sub-nanosecond synchronous precision timing in all nodes by continuous tracking and compensating the transmission delays. We give an overview of the WR project and describe the design goals and specifications of the project. The WR switch and the (user) node which are the central components of the WR system and real timing measurements of prototypes of WR hardware are presented.

Performance analysis of a clock state estimator for PROFINET IO IRT synchronization

Abstract: Clock synchronization is essential to support time-based medium access scheduling and distributed control over industrial networks relying on Real-Time Ethernet (RTE). PROFINET IO is one of the most widely used field-buses in large automation plants. The PROFINET IO Isochronous Real Time (IRT) implementation includes a Precision Transparent Clock Protocol (PTCP) for network-level synchronization. A similar scheme is also used in the second version of the Precision Time Protocol (PTP), standardized as IEEE 1588-2008. Unfortunately, synchronization uncertainty typically grows in the case of long chains of cascaded clocks. In this paper, the accuracy of a clock state estimator based on a Kalman filter is analyzed in the context of PROFINET IO IRT networks. The proposed estimator can be used to compensate the time offsets of every node with respect to the reference master, thus improving synchronization accuracy in the case of long linear topologies beyond the limits of other existing solutions. The presented results are obtained from multiparametric simulations based on the features of real hardware devices.

Method and devices for time and frequency synchronization

Abstract: This invention relates to methods and devices for time and frequency synchronization, especially over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP). Timing protocol messages are exposed to artifacts in the network such as packet delay variations (PDV) or packet losses. Embodiments of the invention provide a recursive least squares mechanism for clock offset and skew estimation. A major potential advantage of such estimation is that it does not require knowledge of the statistics of the measurement noise and process noise. An implementation using a digital phase locked loop based on direct digital synthesis to provide both time and frequency signals for use at the slave (time client) is also provided.

IEEE 1588 Transparent Clock architecture for FPGA-based network devices

Abstract: Apart from traditional test and measurement systems where clock synchronization is required, new emerging application areas like SmartGrids and 4G cellular mobile backhaul networks present strong timing constraints in terms of precise time synchronization. Precision Time Protocol (PTP), as defined in IEEE 1588 standard, offers sub-microsecond synchronization using conventional Ethernet networks. Thus, its acceptance is heavily increasing. However, the protocol performance was reduced in large cascaded networks with varying latencies. This drawback was later softened by the second version of the standard with the introduction of the Transparent Clock (TC) device. In this paper, a general overview of PTPv2 and the utilization of TCs is outlined. The main contribution is a new TC architecture for a FPGA-based network device that benefits from reconfigurable devices flexibility.

Methods to achieve accurate time stamp in ieee 1588 for system with fec encoder

Abstract: Systems and methods and systems are disclosed for allowing the medium access control (MAC) layer in a communication system within an integrated circuit or device to accurately determine a timestamp point and a timestamp value when, for example, the Precision Time Protocol (PTP) protocol is in use by the communication system. Such determination of accurate timestamp point and timestamp value may be used by the communication system to account for and to compensate for the time shift(s) from forward error correction (FEC) sublayer changes in a data frame that is transmitted by the MAC layer. Feedback is provided to the MAC from the FEC to allow the MAC to accurately determine the timestamp point and timestamp value align preamble of the data frame to the beginning of the FEC bit block that is output by the FEC sublayer.

Performance of the Precision Time Protocol for clock synchronisation in smart grid applications

Abstract: Accurate time stamping is essential for reliable operation of the automation and control systems used across a smart grid. This paper investigates the performance of the Precision Time Protocol (PTP) for time distribution over the telecommunication networks interconnecting such systems. Distributed clocks are arranged in a PTP master-slave hierarchy and can be synchronised to an international time standard with sub-microsecond accuracy. Using Hydro Quebec's telecommunications facilities, we investigate the synchronisation error that is observed using some of the latest PTP clock prototypes over a widely spread network. As such, field trials are performed by deploying PTP master and slave clocks in distant sites of Hydro Quebec's wide area network (WAN). A thorough analysis of these trial outcomes is further conducted using laboratory experiments that point out the impact of different parameters such as the PTP messages rate, as well as the link bandwidth and asymmetry. Our analysis leads to important criteria for optimal PTP system design in a WAN environment using appropriate clock and network parameter settings. Improving the PTP clocks internal features is also part of this optimal design, since it is necessary for maintaining the required synchronisation performance in power grid applications running under scarce communication network bandwidth conditions. Copyright © 2013 John Wiley & Sons, Ltd.

On the clock offset estimation in an improved IEEE 1588 synchronization scheme

Abstract: IEEE 1588 specifies a dedicated protocol, the precision time protocol (PTP) for clock synchronization in a networked measurement and control system. It plays an important role in the packet-based network synchronization mechanism. However, the performance of the conventional IEEE 1588 synchronization algorithm is affected by the asymmetric link and random delay problems. This paper proposes an improved IEEE 1588 based synchronization scheme by utilizing additional packets with different sizes to overcome these problems, without adding hardware or overheads. Based on the proposed scheme, this paper derives the maximum likelihood estimators (MLEs) of the clock offset and analyzes the corresponding Cramer-Rao lower bounds (CRLBs) for both Gaussian and exponential random delay models. The performance of the proposed estimator is evaluated in two scenarios with different random delay distribution. The impact of the size of the transmitted packets is studied by simulation. The results show that the proposed scheme and estimators can successfully overcome the detrimental effect of the asymmetric link and random delay problems. The synchronization accuracy of the proposed scheme significantly outperforms both the conventional IEEE 1588 scheme and an existing method in terms of clock offset bias error without the need of extra hardware.

Time synchronization device, equipment and system

Abstract: The invention discloses a time synchronization device, equipment and system, which are used for solving the problem that a plurality of 1PPS(1 Per Pulse Second)+TOD (Time Of Day) interface standards cannot be compatible or be subjected to time synchronization in the prior art. Two time synchronization devices are respectively provided from a master equipment side and a slave equipment side for time synchronization; the time synchronization device of the master equipment side is used for converting time information in a PTP (Precision Time Protocol) format into TOD time information with various 1PPS+TOD interface standards, generating a 1PPS signal and transmitting the generated 1PPS signal and each type of TOD time information to slave equipment; the time synchronization device of the slave equipment is used for identifying the 1PPS signal and the TOD time information from signals transmitted from master equipment according to the various 1PPS+TOD interface standards, converting the TOD time information into time information in the PTP format and correcting local system time of the slave equipment according to the identified 1PPS signal and the converted time information in the PTP format.

SNTP time synchronization accuracy measurements

Abstract: Time synchronization is a key requirement in many automation systems. There are currently two predominant technologies for time synchronization in automation systems: SNTP (Simple Network Time Protocol) and PTP (Precision Time Protocol). PTP is the preferred technology and has several advantages over SNTP including far better accuracy in most if not all situations. However, legacy systems in many situations have to rely on SNTP. This is a challenge since the requirements on accuracy increase while the systems become larger and more complex. Thus, it is of interest to investigate what kind of accuracy level can be expected with the use of SNTP in modern switched networks. This paper shows that accuracies at the milliseconds level can be achieved for small networks. It is also analyzed how the network infrastructure and the end nodes contribute to the measured inaccuracy.

A method for synchronizing distributed clocks by the precision time protocol, in a telecommunication network

Abstract: The method comprises the steps of: - sending a Sync message (SYNC) from a first peer-to-peer transparent clock (P2P TC B) to a second peer-to-peer transparent clock (P2P TC C), - estimating the path delay of the transmission path travelled by the synchronization message from the first to the second peer-to-peer transparent clocks, - and then taking this path delay into account for updating the time information carried by a synchronization message. For estimating said path delay, it comprises the steps of: - creating a list of the network addresses of the network interfaces (IPRB, IPRI1, IPRI2, IPRC) traversed by the synchronization message (SYNC); - ordering the first list into the order in which the network interfaces have been traversed by the Sync message (SYNC); - creating a second list by reversing the order of the first list; - communicating the second list to the second peer-to-peer transparent clock (P2P TC C); - and using the mechanism available at the transport protocol level, to constrain the respective paths of Pdelay_Req and Pdelay_Resp messages so that their respective paths map to the second and first ordered lists of traversed interfaces.

Implementation method, system and device for multi-clock synchronization technology hybrid networking

Abstract: The invention discloses an implementation method, system and device for multi-clock synchronization technology hybrid networking. A master clock and one or a plurality of slave clocks are arranged for a synchronization device which serves as a clock synchronization service provider and a clock synchronization service receiver simultaneously. The synchronization device sends clock source information to slave clocks on adjacent synchronization devices through the master clock, and receives the clock source information from master clocks on the adjacent synchronization devices through the slave clocks, wherein the adjacency of the synchronization devices means direct connection or connection of bridging networks which do not support the clock synchronization technology. The implementation method, system and device for the multi-clock synchronization technology hybrid networking can enable the precision time protocol (PTP) synchronization devices to switch and lock other clock sources normally when clock source failure occurs under the situation of physical clock technology and grouping clock technology hybrid networking, and the problem of the clock source switching failure under the situation of the hybrid networking is solved.

Automatic Network Discovery In Precision Time Protocol Networks

Abstract: Aspects of the present invention provide systems and methods using precise timing relationships between nodes in computer networks to generate mappings depicting the physical arrangement or ordering of nodes in the computer networks. The technical effect is by tracking the timing delays between nodes as observed by an individual node, and collecting such information together for subsequent processing, nodes may receive and/or construct an entire physical network topology using an algorithm accordingly.

Clock synchronization method based on PTP (Precision Time Protocol) and reflective memory network

Abstract: A clock synchronization method based on a PTP (Precision Time Protocol) and a reflective memory network relates to the technical field of virtual simulation tests. According to the invention, the problem of the existing communication method that the clock synchronization precision is low due to unstable network can be solved, and the clock synchronization method based on the PTP and the reflective memory network is provided. The method is applicable to the clock synchronization between a host and node equipment in a virtual simulation experiment. A reflective memory card is inserted into each of the host and the node equipment respectively, and the data transmission is carried out by a fiber between the reflective memory cards in the host and the node equipment. The method comprises the following steps: a main clock and a slave clock are constructed; an offset correction phase is carried out; the offset correction is repeated; an offset value is obtained by a data processing algorithm; an optimal fitting value is obtained; a delay correction phase is carried out; the relay correction is repeated; a delay value is obtained by the data processing algorithm; and an optimal fitting value is obtained to complete the synchronization of the main clock and the slave clock. The method is suitable for virtual simulation tests.

New algorithm for IEEE 1588 time synchronization under the presence of significant delay variation

Abstract: Time synchronization is one of the basic services in a distributed network as it enables a lot of services, for example synchronized measurements or timeslot-based access to shared communication media. The IEEE 1588 defines the precision time protocol (PTP) that aims to synchronize multiple slave clocks to a master clock by means of synchronization event messages. Unfortunately, the accuracy of time synchronization strongly depends on delay variations produced by the underlying telecom network. Such behavior represents a strong issue, particularly considering the network consisting of devices that are not IEEE 1588 capable. A conventional clock servo will not provide enough accurate level of synchronization in the case of considerable delay variation. We develop a novel time synchronization algorithm that is based on a generic statistical approach and explicitly takes into account the stochastic properties of delay of PTP messages. Numerical simulations show that this algorithm is effective for estimation of the time offset between master and slave reliably, even under significant delay variations.

Time synchronization method and time synchronization device

Abstract: The invention discloses a time synchronization method and a time synchronization device. The time synchronization method includes that home terminal equipment enables a PTP (precision time protocol) function for aggregation ports, active ports are selected from physical member ports of the aggregation ports, and the PTP function is configured for the active ports; role information is exchanged between the home terminal equipment and PTP opposite terminal equipment, and the active ports are configured by the aid of the determined role information; the home terminal equipment performs time synchronization via the active ports and active ports of the opposite terminal equipment. The time synchronization method and the time synchronization device have the advantages that time synchronization on the basis of the aggregation ports is implemented, and time synchronization between the home terminal equipment and the opposite terminal equipment is implemented; the PTP function is directly enabled on the aggregation ports, so that configuration is simplified for users, consumption of equipment resources is reduced, the performance of the equipment is improved, and the network topology stability is enhanced.

Precision timing in TDMA-based Wireless Sensor Network through IEEE 1588 standard

Abstract: Abstrac t This paper proposes an energy-efficient time synchronization scheme for Wireless Sensor Networks (WSNs) based on the IEEE 1588 standard. Although a number of methods have been studied for time synchronization of WSNs, some applications require high precision time synchronization with very low power consumption. This paper presents a reduced implementation of IEEE 1588 precision time protocol (PTP) for WSNs. Within the proposed synchronization approach, a sensor node is synchronized using the timing message generated by a master node synchronized with GPS. This paper also presents experiments to evaluate the performance of the precision time synchronization of a slave-master pair of sensor nodes.

Method and network device for conducting time synchronization based on precision time protocol

Abstract: The embodiment of the invention provides a method and network device for conducting time synchronization based on precise time protocol. The method comprises the following steps that a first synchronous message transmitted by a main clock reaches a circuit processing unit of the network device, the circuit processing unit forwards a second synchronous message to a main processing unit of the network device, the main processing unit generates a third synchronous message according to the second synchronous message, generates a first delay request message according to the third synchronous message, and generates a second delay request message according to the first delay request message and forwards to the circuit processing unit, the circuit processing unit generates a third delay request message according to the second delay request message and forwards to the main clock, and then receives a first delay response message transmitted by the main clock, and finally the main processing unit calibrates the time of the main processing unit. Due to the adoption of the technical scheme, the occupation of the circuit processing unit on the software resource and the hardware resource can be reduced.

Method and device for selecting clock source

Abstract: The invention discloses a method and a device for selecting a clock source. The method comprises the following steps that: slave clock equipment receives a PTP (precision time protocol) message which is transmitted by master clock equipment; after the PTP message is received, a hop count passed by the PTP message is obtained; and according to the hop count passed by the PTP message, the clock source is selected from the master clock equipment. When the PTP message passes through an IP (internet protocol) and/or MPLS (multiple protocol label switching) network for frequency synchronization, by analyzing the TTL (time to live) value of the message, the slave clock equipment can obtain the hop count passed by the message, the hop count is used as a reference factor for a BMC (best master clock) algorithm, the slave clock equipment can select the clock source more optimally for synchronization, and the synchronization performance and the synchronization accuracy of the slave clock equipment are improved.

Application of precision time protocol to smart substation

Abstract: The invention relates to the network technology, particularly to the communication network time synchronization technology. An application of a precision time protocol to a smart substation comprises the precision time protocol operating in the smart substation, an ordinary clock, a boundary clock and a management node, wherein the ordinary clock is only provided with a communication port of the precision time protocol, while the boundary clock is provided with more than two communication ports of the precision time protocol, and each communication port of the precision time protocol provides independent precision time protocol communication. An accurate clock synchronization protocol related with network communication, local calculation and distributed objects in a measurement and control network is defined, has the advantages that high-accuracy synchronization at the submicrosecond level can be achieved, and the protocol is incomparable for the network time protocol (NTP) with the synchronization accuracy only up to the millisecond level.

Improvement of NTP synchronization accuracy for switch-oriented power monitoring networks

Abstract: In order to improve the synchronization accuracy of NTP(Network Time Protocol) for switch-oriented power monitoring networks,an improved protocol,SN-NTP(Switch Networks-NTP),is proposed,which enhances the synchronization accuracy to 17 times the original theoretically.SN-NTP is based on the priority scheduling foundation of switch protocol IEEE802.1p.First,NTP client continuously sends the short packets with higher priority to NTP server to block the switch path and make other data packets in waiting state.Then,NTP client sends NTP request packet with highest priority to NTP server to seize the switch path of short packets.By the above two steps,the maximum waiting time of request packet under SN-NTP becomes one seventeenth of that under NTP and the synchronization accuracy is improved.SN-NTP performance test of ship power monitoring network shows that the synchronization accuracy is improved to 15 to 24 times the original,coinciding with theoretical analysis.

PTP protocol-based transparent clock passive port voting method and apparatus

Abstract: The invention provides a precision time protocol (PTP) protocol-based transparent clock passive port voting method and apparatus. According to the method, a first port of network equipment extracts a TLV field of a received proclaiming message to obtain clock identifier information, forwarding number information and port identifier information, wherein the information is carried by the TLV field; comparison of the forwarding number information and the clock identifier information that is carried by the TLV field with forwarding number information carried by a TLV field contained by a proclaiming message received from a port by the network equipment and clock identifier information of the equipment itself, thereby selecting one port as a passive port. Therefore, because comparison factors including the clock identifier information, the forwarding number information, and the port identifier information are added in the TLV filed of the proclaiming message, the transparent clock can support the PTP protocol, so that a protocol storm formed by PTP messages in the complex topology network or the loop network that is formed by the transparent clock can be avoided and thus the network stability is improved.

Delivering precision time protocol frequency and phase synchronization over a network without on-path support

Abstract: Systems, methods, and computer-readable media for precision time protocol (PTP) frequency and phase synchronization to unanchored sites over non on-path supported networks are provided. In embodiments, the method includes continuously measuring one-way delay (OWD) and delay offset from a host site to an anchored site to determine a dynamic corrective offset (DCO). One of a plurality of unanchored sites is identified. In embodiments, the DCO is applied to PTP sync or PTP follow-up messages communicated from the host site to the identified unanchored site. The clocks associated with the unanchored sites are synchronized to the host clock.

IEEE 1588 based time synchronization system for a seafloor observatory network

Abstract: An IEEE 1588 based application scheme was proposed to achieve accurate time synchronization for a deep seafloor observatory network based on the communication topological structure of the Zhejiang University Experimental and Research Observatory. The principles of the network time protocol (NTP) and precision time protocol (PTP) were analyzed. The framework for time synchronization of the shore station, undersea junction box layer, and submarine science instrument layer was designed. NTP and PTP network signals were decoded by a PTP master clock on a shore station that receives signals from the Global Positioning System and the BeiDou Navigation Satellite System as reference time sources. These signals were remotely transmitted by a subsea optical-electrical composite cable through an Ethernet passive optical network. Accurate time was determined by time synchronization devices in each layer. Synchronization monitoring experiments performed within a laboratory environment indicated that the proposed system is valid and has the potential to realize microsecond accuracy to satisfy the time synchronization requirements of a high-precision seafloor observatory network.