Showing papers on "Prime-factor FFT algorithm published in 1985"

On computing the discrete Hartley transform

Abstract: The discrete Hartley transform (DHT) is a real-valued transform closely related to the DFT of a real-valued sequence. Bracewell has recently demonstrated a radix-2 decimation-in-time fast Hartley transform (FHT) algorithm. In this paper a complete set of fast algorithms for computing the DHT is developed, including decimation-in-frequency, radix-4, split radix, prime factor, and Winograd transform algorithms. The philosophies of all common FFT algorithms are shown to be equally applicable to the computation of the DHT, and the FHT algorithms closely resemble their FFT counterparts. The operation counts for the FHT algorithms are determined and compared to the counts for corresponding real-valued FFT algorithms. The FHT algorithms are shown to always require the same number of multiplications, the same storage, and a few more additions than the real-valued FFT algorithms. Even though computation of the FHT takes more operations, in some situations the inherently real-valued nature of the discrete Hartley transform may justify this extra cost.

Implementation of "Split-radix" FFT algorithms for complex, real, and real symmetric data

Abstract: A new algorithm is presented for the fast computation of the Discrete Fourier Transform. This algorithm belongs to that class of recently proposed 2n-FFT's which present the same arithmetic complexity (the lowest among any previously published one). Moreover, this algorithm has the advantage of being performed "in-place", by repetitive use of a "butterfly"- type structure, without any data reordering inside the algorithm. Furthermore, it can easily be applied to real and real symmetric data with reduced arithmetic complexity by removing all redundancy in the algorithm.

Prime factor decomposition of the discrete cosine transform and its hardware realization

Abstract: The discrete cosine transform (DCT) is an useful tool in solving many digital signal processing problems. One of its more interesting applications is in the realization of a bandpass filter-bank that is necessary to perform conversion between time-division and frequency-division voice multiplexing systems. In this particular example the transform size is dictated by the sampling frequencies and the computationally-efficient power-of-2 algorithms may not applicable. To handle such situations, a new DCT algorithm based on a prime factor decomposition of the transform-length is presented in this paper. To begin with, the definition of the DCT is introduced with a brief discussion of the application mentioned. The existence of the prime factor decomposition technique is derived based on a similar decomposition for the discrete Fourier transform (DFT). The prime factor algorithm for the DCT (PFA-DCT) is then described step by step and followed by an example of a 12-point transform which delineates the method and brings out the essence of the algorithm. A hardware implementation of a 72-point DCT is outlined to illustrate the usefulness of this algorithm in practical systems.

A comparison of the time involved in computing fast Hartley and fast Fourier transforms

Abstract: It is shown that the DFT of a real sequence, formed via the Fast Hartley Transform, can be computed at most only 2 times faster than by using a complex Fast Fourier Transform. However, more sophisticated FFT algorithms exist which give the same speedup factor. A simple FHT subroutine is presented to illustrate the similarity of the FHT and FFT butterflies in their simplest forms.

On the structure of efficient DFT algorithms

Abstract: This paper examines the structure of the prime length discrete Fourier transform algorithms that are developed by Winograd's approach. It is shown that those algorithms have considerable structure, and this can be exploited to develop a straightforward design procedure which does not use the Chinese remainder theorem and which includes any allowed permutations. This structure also allows the design of real-data programs and the improvement of the data transfer properties of the prime factor algorithm.

The Fast Fourier Transform (FFT)

Abstract: The Fast Fourier Transform (FFT) is one of the most frequently used mathematical tools for digital signal processing. Techniques that use a combination of digital and analogue approaches have been increasing in numbers. This chapter is for establishing the basis of this combined approach in dealing with computer tomography, computer holography and hologram matrix radar.

Systolic implementations for deconvolution, DFT and FFT

Abstract: The paper presents a number of systolic configurations for computing deconvolutions and discrete Fourier transformations. Two approaches to deconvolution are considered: a time-domain approach, which is based on a systolic inversion of an associated Toeplitz matrix, generated by a wavefront propagation of the known system response, while the other approach, which is in the frequency domain, utilises systolic discrete Fourier transform (DFT) and fast Fourier transform (FFT) processors. The latter employs a systolic elevator concept, which circumvents the traditional need for global communications in the FFT. Aspects of hardware implementation and speed trade-offs are also discussed.

Vector-radix algorithm for a 2-D discrete Hartley transform

Abstract: A new multidimensional Hartley Transform is defined and a vector-radix algorithm for fast computation of the transform is developed. The algorithm is shown to be faster (in terms of multiplication and addition count) compared to other related algorithms.

A new discrete Fourier transform algorithm using butterfly structure fast convolution

Abstract: This paper proposes a new approach to computing the discrete Fourier transform (DFT) with the power of 2 length using the butterfly structure number theoretic transform (NTT). An algorithm breaking down the DFT matrix into circular matrices with the power of 2 size is newly introduced. The fast circular convolution, which is implemented by the NTT based on the butterfly structure, can provide significant reductions in the number of computations, as well as a simple and regular structure, The proposed algorithm can be successively implemented following a simple flowchart using the reduced size submatrices. Multiplicative complexity is reduced to about 21 percent of that by the classical FFT algorithm, preserving almost the same number of additions.

Spectrum Amplitude of Step-Like Waveforms Using the Complete-FFT Technique

Abstract: The complete Fast Fourier Transform (FFT) technique for the computation of the spectrum amplitude of step-like waveforms is presented in this paper. The complete FFT technique offers an enhanced resolution, and produces a dc and equally spaced harmonic components for the spectrum amplitude. The technique is applied to an analytical waveform in order to discuss its accuracy and analyze the associated errors. It is also applied to an experimentally acquired waveform for demonstration purposes.

Nearest neighbor and generalized inverse distance interpolation for Fourier domain image reconstruction

Abstract: Several well known imaging techniques operate by recording samples of the Fourier transform of the object function and then reconstructing the object function by means of the 2D inverse FFT. A central problem arises in interpolating from the inherent polar raster to a rectangular raster, so the inverse FFT can be properly applied. This paper considers the use of nearest neighbor and inverse distance interpolation when the angular recording interval is relatively small. The objective is to obtain a computationally simple reconstruction algorithm that achieves good resolution in the final image plane.

Bit-level systolic array implementation of the winograd fourier transform algorithm

Abstract: A bit level systolic array system is proposed for the Winograd Fourier transform algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest-neighbour interconnections, regularity and high throughput. The short interconnections in this method contrast favourably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform a short length transform. These components build into longer transforms preserving the regularity and structure of the short length transform design.

A prime factor FFT algorithm with real valued arithmetic

Abstract: A prime factor FFT algorithm involving only real valued arithmetic is devised to compute the discrete Fourier transform of a real sequence. This letter extends an approach proposed by Bracewell.

Multiply/Add tradeoffs in length-2 n FFT algorithms

Abstract: The multiplicative complexity of the length-2ndiscrete Fourier Transform is derived. A constructive approach is followed which describes the set of algorithms that realize the minimum number of multiplications. The operation counts of minimum multiply algorithms are compared to other FFT algorithms. The basic method is extended to derive the multiplicative complexity of length-pnDFFs where p is an odd prime number.

A Hankel transform algorithm for uniformly sampled data

Abstract: A new Hankel transform algorithm designed for uniformly sampled data is presented. Although data of this type occur frequently, previous algorithms require interpolations and/or numerical evaluations of Bessel functions. These difficulties can be avoided by using a Tchebycheff transform followed by a Fourier transform. The basic structure and performance of any Hankel transform algorithm derived from this two-step process depends on the combined results from the numerical methods used to compute the Tchebycheff and Fourier transforms. The algorithm presented here is the most elementary of several algorithms derived from this procedure. Examples are presented and errors associated with the results are discussed.

The Fast Hartley Transform

Abstract: The Fast Hartley TransformH. S. HouElectronics and Optics Division, The Aerospace Corporation2350 E. El Segundo Blvd., El Segundo, California 90245AbstractThe Fast Hartley Transform (FHT) is similar to the Cooley -Tukey Fast Fourier Transform(FFT) but performs much faster because it requires only real arithmetic computationscompared to the complex arithmetic computations required by the FFT. Through use of theFHT, Discrete Cosine Transforms (DCT) and Discrete Fourier Transforms (DFT) can be obtained.The recursive nature of the FHT algorithm derived in this paper enables us to generate thenext higher -order FHT from two identical lower -order FHTs. In practice, this recursiverelationship offers flexibility in programming different sizes of transforms, while theorderly structure of its signal flow graphs indicates an ease of implementation in VSLI.IntroductionRecently, Bracewe111,2 introduced the Discrete Hartley Transform (DHT) as a new member ofthe transform family. The DHT uses the real variable cos(2,rkn /N) + sin(2nkn /N) as thetransform kernel, while the Discrete Fourier Transform (DFT) uses the complex exponential,Exp(i2n kn /N), as the transform kernel. Thus, the DHT is intuitively simpler and hence,faster than the Fast Fourier Transform (FFT) since the multiplication of two complex varia-bles is equivalent to four real multiplications, and a complex addition is two ie.§.l addi-

A systolic implementation of the Winograd Fourier transform algorithm

Abstract: A bit-level systolic array system is proposed for the Winograd Fourier Transform Algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest neighbour interconnections, regularity and high throughput. The short interconnections in this method contrast favourably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform short length transforms. These components build into longer transforms preserving the regularity and structure of the short length transform design.

Comments on and extensions to "Evaluation of Fourier integrals using a FFT with improved accuracy and its applications"

Abstract: The evaluation of Fourier integrals using fast Fourier transform (FFT) employing the Narasimhan scheme is examined. It is observed to be a special case of spline interpolation. His method is effective when the sampling rate is sufficiently high and piecewise linear approximation between sampling points is adequate. If knowledge about the signal smoothness is available, further improvement in accuracy can be achieved by judicious choice of high degree spine interpolant.

Prime Factor DFT parallel processor using wafer scale integration

Abstract: A high speed, flexible, simple and regular Discrete Fourier Transform (DFT) Array Processor architecture based on the Prime Factor Algorithm (PFA) is presented in this paper. The array processor is based only on one type of VLSI cell and can compute an N point DFT in N clock cycles throughput when N is a composit number of prime numbers. The high throughput rate is achieved with only a small number of cells. With a special indexing scheme presented in this paper, this processor can use shift registers as the system memory so that minimum global control and addressing is achieved. This array processor architecture is also highly tolerant to both semiconductor processing yield and processor defects during run time. Thus, it can be manufactured in large quantity with VLSI technology on a single wafer and used in hazardus environments With these advantages, it is very attractive to satellite, military and commercial applications.

Arithmetic Circuitry for High Speed VLSI Winograd Fourier Transform Processor.

Abstract: : The objective of this thesis is to define, design, and implement an efficient VLSI architecture which computes the Discrete Fourier Transform using the Winograd Fourier Transform Algorithm. The architecture includes circuitry to perform input/output, WFT calculations, parity checking and generation, and scale factor generation. Keywords: Chips(Electronics); Digital Signal processing.

Architecture and Numerical Accuracy of High-Speed DFT (Discrete Fourier Transform) Processing Systems.

Abstract: : This thesis examines a very large-scale integrated (VLSI) circuit implementation of the Winograd and Good-Thomas Algorithms for computing discrete Fourier transforms (DFTs) with composite blocklengths after developing the theoretical background for calculating DFTs, the algorithms of interest are presented. A VLSI architecture, which exploits the parallelism and pipelining inherent in the algorithms, is then discussed. Winograd processors use both the small and large Winograd algorithms to compute DFTs with blocklengths of 15, 16, and 17. Longer blocklength DFTs (240, 255, 272, and 4080) are computed using a pipeline of Winograd processors, dual-port memories, and an interface processor; the pipeline uses the Good-Thomas prime factor algorithm. Fault tolerant computing in the initial design of the VLSI architecture. Watchdog processors check both data and addresses of active Winograd processors, while parity checking circuits incorporated in the Winograd processors augment memory error-correction coding. A software simulation determined the numerical accuracy of the VLSI circuit. The signal-to-noise ratio was used as the accuracy metric. The signal was the output of a standard module, which used double-precision arithmetic, while the noise was the difference between the standard and the simulation module. The simulation module used integer arithmetic to exactly mimic operation of the VLSI circuit. Outputs of the standard module were compared with a direct evaluation of the DFT to verify the standard module did compute a DFT.

A New Pipeline/parallel Architecture For Prime Factor Discrete Fourier Transform

Abstract: A new method for implementing prime factor discrete Fourier transforms on array processors is presented. 'The prime factor Fourier transform system are mnstructed based on a new designed parallel processing array processor called Vector Engine. Basic architecture for short length Prime number Fourier transform implementations are discussed. By applying the short length architecture, the implemelltation of long length prime factor Fourier tansforms are discussed and designed. Compared with some well known FFT algorithms, the performance analysis of this system is also discussed.

A fast pipelined DFT processor and its programming consideration

Abstract: A new discrete Fourier transform (DFT) processor with a pipelined structure has been developed. This processor is designed to optimise computation of the pair of operationsAx0 ±Bx1, which is mostly encountered in various fast DFT algorithms. For real-valued data and coefficients, the processor needs only two machine cycles to calculate the pair of operations. A straightforward multiple-stage transform algorithm has been proposed to implement real-valued prime-factor or radix-type transforms. About half of the computation can be saved by taking into account the fact that transform outputs are conjugate pairs for real inputs. The short Winograd Fourier transform algorithm is suggested as a basic building block for large transforms because it is more efficient than the fast Fourier transform.

Use of the FFT to Speed Analysis of Planar Symmetrical 3- and 5-Ports by the Integral Equation Method

Abstract: In a recent paper, it was shown that, for planar two-dimensional problems with symmetry, linear eigenvalue-impedence matrix entry relations may be used to simplify the integral equation method of analysis. In this paper, it is pointed out that, in the case of planar circuits with N-fold rotational symmetry, these linear relations take the form of the discrete Fourier transform (DFT). Consequently, the fast Fourier transform (FFT) may be used in its place to give a further substantial improvement in computational speed.

FFT Drithmetic element built on VLSI high performance gate array

Abstract: The Fast Fourier Transform (FFT) radix-2 butterfly is implemented on a single high speed bipolar gate array. Consideration has been given to questions of algorithm performance and architectural flexibility to achieve both high speed and low noise operation. Multiple FFT AE devices may be connected to form parallel array systems with high processing rates. Four system architectures utilizing the FFT chip employ one, \log_{2}N, N/2 , and (N/2)\log_{2} N arithmetic elements, respectively, for a transform of N points.