Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.

Computing DFT using approximate fast Hartley transform

Abstract: We propose an approximate fast Hartley transform (FHT) based method to compute the discrete Fourier transform (DFT) coefficients approximately. The approximate FHT is implemented using a periodic discrete wavelet transform (DWT). We find that the proposed method is computationally superior to both the radix 2 fast Fourier transform (FFT) and also the radix 2 approximate FFT algorithms.

Hybrid FFT-ADALINE algorithm with fast estimation of harmonics in power system

Abstract: Hybrid fast Fourier transform Adaptive LINear Element (FFT-ADALINE) algorithm for fast and accurate estimation of harmonics is proposed in this study. The FFT method can perform fast conversion from time domain to frequency domain, but it cannot respond immediately to any change of the measured harmonics due to the utilisation of buffer. Meanwhile, ADALINE has better capability to respond immediately due to its learning ability, but its settling time is about two cycles of the measurement signal. In the proposed method, both of the aforementioned algorithms are combined for harmonic estimation where it is able to respond immediately to any change of the measured harmonics and the settling time is reduced to half cycle of the measurement signal. The theory of the proposed algorithm is the application of FFT with weights updating rule to reduce the error of ADALINE instantaneously. The robustness of the proposed method is simulated via MATLAB Simulink. The validity of the simulation work is further proven by the experimental work, which has been done with Chroma programmable AC source model 6590 and non-linear load operations. The proposed algorithm operates in good and accurate performance with the settling time is within half cycle.

Interpolation by fast Fourier and Chebyshev transforms

Abstract: Transform methods for the interpolation of regularly spaced data are described, based on fast evaluation using discrete Fourier transforms. For periodic data adequately sampled, the fast Fourier transform (FFT) is used directly. With undersampled or aperiodic data, a Chebyshev interpolating polynomial is evaluated by means of the FFT to provide minimum deviation and distributed ripple. The merits of two kinds of Chebyshev series are compared. All the methods described produce an interpolation passing directly through the given values and are applied easily to the multi-dimensional case.

Low power reconfigurable FP-FFT core with an array of folded DA butterflies

Abstract: A variable length (32 ~ 2,048), low power, floating point fast Fourier transform (FP-FFT) processor is designed and implemented using energy-efficient butterfly elements. The butterfly elements are implemented using distributed arithmetic (DA) algorithm that eliminates the power-consuming complex multipliers. The FFT computations are scheduled in a quasi-parallel mode with an array of 16 butterflies. The nodes of the data flow graph (DFG) of the FFT are folded to these 16 butterflies for any value of N by the control unit. Register minimization is also applied after folding to decrease the number of scratch pad registers to (log 2 N − 1) × 16. The real and imaginary parts of the samples are represented by 32-bit single-precision floating point notation to achieve high precision in the results. Thus, each sample is represented using 64 bits. Twiddle factor ROM size is reduced by 25% using the symmetry of the twiddle factors. Reconfigurability based on the sample size is achieved by the control unit. This distributed floating point arithmetic (DFPA)-based design of FFT processor implemented in 45-nm process occupies an area of 0.973 mm2 and dissipates a power of 68 mW at an operating frequency of 100 MHz. When compared with FFT processor designed in the same technology with multiplier-based butterflies, this design shows 33% less area and 38% less power. The throughput for 2,048-point FFT is 222 KS/s and the energy spent per FFT is 7.4 to 14 nJ for 64 to 2,048 points being one among the most energy-efficient FFT processors.

Concurrent error detection in fast unitary transform algorithms

Abstract: Discrete fast unitary transform algorithms, of which the fast Fourier transform (FFT) and fast discrete Cosine transform (DCT) are practical examples, are highly susceptible to temporary calculation failures because of their interconnected computational flows. Many error detection techniques for FFT algorithms have been reported, but fault tolerance issues for other important transforms have not been addressed as vigorously. A general design and analysis approach for all fast unitary transforms is presented. It relies on fundamental linear algebra methods coupled with associated dual space representations that are natural descriptions of real parity values. Basic output error patterns from single computational errors are used to define an equal-sized group of dual space basis vectors on which practical parity weighting functions may be evaluated. An iterative design approach leads to complete single error detection capabilities. FFT and fast DCT examples are given.