Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.

Recursive Discrete Fourier Transform based SMT receivers for cognitive radio applications

Abstract: This paper presents a modified Staggered MultiTone (SMT) receiver structure tailored to cognitive radio applications. SMT schemes employing Fast Fourier Transform (FFT) in the receiver for demodulation are discussed in the first part. The second part deals with Recursive Discrete Fourier Transform (R-DFT) originating from measurement systems. The recursive structure is suggested as an alternative to FFT for demodulation and spectral sensing. The paper concludes with a discussion of the advantages of the proposed receiver architecture especially in cognitive radio applications, and the investigation of the required signal processing complexity.

Parallel DFT gradients using the Fourier Transform Coulomb method.

Abstract: The recently described Fourier Transform Coulomb (FTC) algorithm for fast and accurate calculation of Density Functional Theory (DFT) gradients (Fusti-Molnar, J Chem Phys 2003, 119, 11080) has been parallelized. We present several calculations showing the speed and accuracy of our new parallel FTC gradient code, comparing its performance with our standard DFT code. For that part of the total derivative Coulomb potential that can be evaluated in plane wave space, the current parallel FTC gradient algorithm is up to 200 times faster in total than our classical all-integral algorithm, depending on the system size and basis set, with essentially no loss in accuracy. Proposed modifications should further improve the overall performance relative to the classical algorithm.

Reducing power consumption in FFT architectures by using heuristic-based algorithms for the ordering of the twiddle factors

Abstract: This paper addresses the exploration of different heuristic-based algorithms for a better manipulation of coefficients in Fast Fourier Transform (FFT). Due to the characteristics of the FFT algorithms, which involve multiplications of input data with appropriate coefficients, the best ordering of these operations can contribute for the reduction of the switching activity, what leads to the minimization of power consumption in the FFTs. The heuristic-based algorithm named Bellmore and Nemhauser and a new proposed one named Anedma are used to get as near as possible to the optimal solution for the ordering of coefficients in FFTs with larger number of points. As will be shown, the appropriate ordering of coefficients, based on the guidance given by the Anedma heuristic algorithm, can contribute for the reduction of power consumption of the FFT architectures.

Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization

Abstract: This paper reports the optimization of area and power for a 32-point radix-2 hybrid FFT (Fast Fourier Transform). The strategy consists of using the Constant Matrix Multiplication (CMM) method along the stages of the 8-point FFT architecture, which is implemented with Carry Save Adders (CSA). The use of CMM at gate level enables the replacement of the multiplication operations by addition/subtractions and shifts for each stage of the real and imaginary parts of the butterflies. The 32-point FFT is obtained through the composition of the optimized 8-point FFT modules. The partial decomposition of coefficients allows the computation of all coefficients necessary for the 32-point through a control unit. We have compared our proposed architecture to an implemented behavioral, unrestricted architecture synthesized using the CADENCE Encounter RTL Compiler for the UMC130nm technology. The results show reductions up to 31% in area and 15% in power when using our proposed solution.