Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.

Canonic real-valued FFT structures

Abstract: An N-point FFT processes N complex signals to compute N output complex signals using decimation-in-time (DIT) or decimation-in-frequency (DIF) approach. The FFT makes use of n = log 2 N stages of computations where each stage computes N complex signals; N is assumed to be power-of-two. This paper considers implementation of a real signal of length N. Since the degrees of freedom of the input data is N, each stage of the FFT should not need to compute more than N signal values, where a signal value can corresponds to a purely real or purely imaginary value. Any more than N samples computed at any FFT stage is inherently redundant. This paper, for the first time, presents novel DIT and DIF structures for computing real FFT, referred as RFFT, that are canonic with respect to the number signal values computed at each FFT stage. In the proposed structure, in an N-point RFFT, exactly N signal values are computed at the output of each FFT stage and at the output. No prior canonic DIT RFFT structure was presented before. This paper, for the first time, presents a formal approach to compute RFFT using DIT in a canonic manner. While canonic FFT structures based on decimation-in-frequency were presented before, these structures were derived in an adhoc way. This paper presents a formal method to derive canonic DIF RFFT structures.

High-speed assembly FFT implementation with memory reference reduction on DSP processors

Abstract: The memory reference in digital signal processors (DSP) is among the most costly of operations due to its long latency and substantial power consumption Previously proposed twiddle-factor-based butterfly grouping methods can effectively minimize memory references due to twiddle factors for implementing any existing fast Fourier transform (FFT) algorithms on DSP However, the performance of its C implementation on DSP is far behind the corresponding TI assembly benchmark for radix-2 DIF FFT due to limitations of the compiler In this paper, we propose a hand-coded assembly implementation for the radix-2 DIF FFT algorithm with the twiddle-factor-based butterfly grouping method on a TI TMS320C64/spl times/ DSP Experimental results show that for 1024-pt radix-2 DIF FFT, our hand-coded assembly implementation is 8 times faster than the C implementation and slightly faster than the TI assembly benchmark while requiring only 50% of memory references due to twiddle factors compared to the TI assembly benchmark

Elimination of minimal FFT grid‐size limitations

Abstract: The fast Fourier transform (FFT) algorithm as normally formulated allows one to compute the Fourier transform of up to N complex structure factors, F(h), N/2 ≥ h > −N/2, if the transform ρ(r) is computed on an N-point grid. Most crystallographic FFT programs test the ranges of the Miller indices of the input data to ensure that the total number of grid divisions in the x, y and z directions of the cell is sufficiently large enough to perform the FFT. This note calls attention to a simple remedy whereby an FFT can be used to compute the transform on as coarse a grid as one desires without loss of precision.