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Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.


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Proceedings ArticleDOI
27 Jul 2001
TL;DR: This work develops a parallel algorithm for FFT and implements it to price options and discusses the performance of the algorithm and the results from FFT algorithm and binomial tree algorithm developed and implemented for the same/similar problem.
Abstract: Pricing of derivatives is one of the central problems in Computational Finance. Since the theory of derivative pricing is highly mathematical, numerical techniques such as lattice approach, finite-difference and finite-element techniques among others have been resorted in the past. Recently Fast Fourier Transform (FFT) have been used for such applications as derivative pricing. In the current work, we develop a parallel algorithm for FFT and implement it to price options. Our main aim is to study the performance of this algorithm. For a data size of N and P processors, a blocked data distribution for the algorithm in general produces log(N) - log(P) iterations of local communications and log(P) iterations of remote communications. Therefore, the algorithm is divided into two parts: local and remote. In the local algorithm, the processors perform the computations on their locally partitioned data elements without any communications. In the case of remote algorithm, the processors perform the computation on the local data elements with remote communications. In this paper we focus on the remote communication and computation aspect of the algorithm. We discuss the performance of our algorithm and the results (in general terms) from FFT algorithm and binomial tree algorithm developed and implemented for the same/similar problem. We make some general observation on these two algorithms.

5 citations

Journal Article
TL;DR: A parallel architecture for the implementation of the radix 4 and mixed radix FFT algorithm is presented and the dedicated parallel memory mapping algorithm with the feature of minimal memory size relies on the in place calculation property of the FFT algorithms.
Abstract: A parallel architecture for the implementation of the radix 4 and mixed radix FFT algorithm is presented The dedicated parallel memory mapping algorithm with the feature of minimal memory size relies on the in place calculation property of the FFT algorithm, and can simultaneously access to all the data needed for calculation of each butterfly The address generation of twiddle factors only need simple operation in this algorithm The hardware complexity of the butterfly processor is reduced by using 3 real multipliers algorithm for a complex multiplier The processor can be configured for transforms of lengths N , where N is power of two The implementation is on an Altera chip EP200K400E using Altera Quartus II 2 0 Operating at 89MHz clock frequency the processor computes a complex 1024 point FFT within 14 1μs and 4096 point FFT within 67μs

5 citations

Proceedings ArticleDOI
08 May 1995
TL;DR: The new algorithm is derived from the enhanced image processing (EIP) algorithm described by Ausherman et al. (1984) and is based on using the Fast Fourier Transform to rotate and interpolate the linear images before compositing.
Abstract: This paper describes a new algorithm for implementing wide angle imaging. The new algorithm is derived from the enhanced image processing (EIP) algorithm described by Ausherman et al. (1984) and is based on using the Fast Fourier Transform (FFT) to rotate and interpolate the linear images before compositing. The new algorithm is more accurate than the linear interpolation based compositing scheme used by Ausherman and is designed to perform efficiently on modern vector array processors. First, correlation imaging and the relationship between linear imaging and wide angle imaging is discussed. Following the discussion of the enhanced imaging technique, the new algorithm for implementing the EIP is described. After the theory is discussed, an example demonstrating the efficacy of the new algorithm is presented. The effect of different strategies for reducing sidelobes in the EIP imagery is also discussed. A comparison of the computational complexity of the new algorithm with the traditional algorithm is presented. The paper concludes with a summary.

5 citations

Proceedings ArticleDOI
28 May 2010
TL;DR: In this paper, an accurate and stable method for pricing European options in exp−Levy models is presented, combining the quadrature technique and the Carr-Madan Fast Fourier Transform methods.
Abstract: An accurate and stable method for pricing European options in exp‐Levy models is presented. The main idea of this new method is combining the quadrature technique and the Carr‐Madan Fast Fourier Transform methods. The theoretical analysis shows that the overall complexity of this new method is still O(N log N) with N grid points as the fast Fourier transform methods. Numerical experiments for different exp‐Levy processes also show that the numerical algorithm proposed by this new method has an accuracy and stability for the small strike prices K. That develops and improves the Carr‐Madan method.

5 citations

Proceedings ArticleDOI
08 Dec 2008
TL;DR: This paper presents a novel FFT algorithm based on a multi-dimensional index mapping method that exploits the symmetry of twiddle factors to minimize the number of multipliers and remain the simpleness of the butterfly computation.
Abstract: This paper presents a novel FFT algorithm based on a multi-dimensional index mapping method. Twiddle factor multiplications are decomposed in a divide and conquer approach to minimize the number of multipliers and remain the simpleness of the butterfly computation. And canonic signed digit representation is applied to constant multiplications introduced from the decomposition. By exploiting the symmetry of twiddle factors, the algorithm also reduces the memory requirement for twiddle factors. These characteristics make the proposed algorithm suitable for long size FFT VLSI implementation. Based on the algorithm we propose an efficient pipeline FFT architecture and implement a 1024-point FFT processor by 0.18 um CMOS technology.

5 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20235
202224
20211
20188
201757
201692