Topic
Prime-factor FFT algorithm
About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.
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TL;DR: This paper proposes efficient FFT VLSI architectures using folded/parallel implementation, in the proposed folded FFT architecture, the number of cycles required to complete the operation is less than single path delay feedback (SDF)/multi-path delay commutator (MDC) architectures.
4 citations
TL;DR: The discrete Fourier transform and the FFT algorithm are extended from the circle to continuous graphs with equal edge lengths.
4 citations
18 Sep 2003
TL;DR: Wang et al. as mentioned in this paper combined integer DCT with EZW zerotree and STQM arithmetic coding together to achieve progressive until lossless image compression, which is quite efficient.
Abstract: This paper completes the construction of FFT (fast Fourier transform) that map integers to integers by using lifting scheme and butterfly-style construction. Through building integer FFT which keeps conjugate symmetry for real signal, and expressing DCT by FFT, invertible integer DCT can be easily gotten, which makes lossless image compression possible. At last, we combine integer DCT with EZW zerotree and STQM arithmetic coding together. Experimental results show this method is quite efficient for progressive until lossless image compression.
4 citations
01 Jan 2013
TL;DR: The proposed design is focused on trade off between speed and cost as these factors should be taken into consideration when designing signal processing systems on FPGA platforms.
Abstract: In this paper authors have discussed about FFT algorithm on periodic waveform using different windows , how window function reduces spectral leakage and how higher order FFT can be realized using lower order FFT has been discussed. The proposed design is focused on trade off between speed and cost as these factors should be taken into consideration when designing signal processing systems on FPGA platforms. 64 point FFT can be realized using 8 point FFT has shown i.e higher order FFT can be realizes using smaller pont FFT. Different windows on periodic waveform has created and simulated using Matlab 2007a.
4 citations
TL;DR: In this article, a high-resolution fast Fourier transform (FFT)/inverse FFT (IFFT) processor was designed for constraints analysis purpose, and an optimum operating mode based on the signal-to-quantization-noise ratio (SQNR) was proposed to minimize the trade-off issues associated with selecting the most application-efficient floating point processing capability in contrast to their resolution quality.
Abstract: This research work focuses on the design of a high-resolution fast Fourier transform (FFT)/inverse FFT (IFFT) processors for constraints analysis purpose. Amongst the major setbacks associated with such high-resolution FFT processors are the high-power consumption resulting from the structural complexity and computational inefficiency of floating-point calculations. As such, a parallel pipelined architecture was proposed to statically scale the resolution of the processor to suite adequate trade-off constraints. The quantisation was applied to provide an approximation to address the finite word-length constraints of digital signal processing. An optimum operating mode was proposed, based on the signal-to-quantisation-noise ratio (SQNR) as well as the statistical theory of quantisation, to minimise the trade-off issues associated with selecting the most application-efficient floating-point processing capability in contrast to their resolution quality.
4 citations