Topic
Prime-factor FFT algorithm
About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.
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01 Nov 2015
TL;DR: This paper represents a FPGA implementation of the serial FFT and IFFT architecture in one block without reordering the block, and the design is simulated using Modelsim simulator.
Abstract: There has been many implementation of the serial Fast Fourier Transform (FFT) operation In the most cases, output of the serial FFT block is in bit reversed order, so it need a reordering block to reorder the output However some of the FFT application does not require the ordered output of FFT, such like spectral subtraction method In the paper, we represent a FPGA implementation of the serial FFT and IFFT architecture in one block without reordering the block The design is simulated using Modelsim simulator Our 8 point FFT /IFFT blocks utilizes 16102 logic elements on the chip ie 24% of the available logic blocks The block can work in maximum frequency of 1256 MHz
3 citations
TL;DR: A fast algorithm of realizing a method of inverting a long liner convolution based on the procedure of sectionalization combined with effective real-valued split- radix fast Fourier transformation (FFT) algorithm for solving problems of restoration digital signals (images).
Abstract: A fast algorithm of realizing a method of inverting a long liner convolution is presented. It is based on the procedure of sectionalization combined with effective real-valued split- radix fast Fourier transformation (FFT) algorithm for solving problems of restoration digital signals (images). The minimal multiplicative complexity of such algorithm is obtained.
3 citations
TL;DR: For the discrete Fourier transform with respect to the system of characters of a local field with positive characteristic, a fast algorithm is proposed and the complexity of the algorithm is found.
Abstract: For the discrete Fourier transform with respect to the system of characters of a local field with positive characteristic, we propose a fast algorithm. We find the complexity of the algorithm.
3 citations
01 Sep 2003
TL;DR: A new algorithm is presented for the plus/minus factorization of a scalar discrete-time polynomial based on the discrete Fourier transform theory (DFT) and its relationship to the Z-transform, which brings high computational efficiency and reliability.
Abstract: In this report a new algorithm is presented for the plus/minus factorization of a scalar discrete-time polynomial. The method is based on the discrete Fourier transform theory (DFT) and its relationship to the Z-transform. Involving DFT computational techniques, namely the famous fast Fourier transform routine (FFT), brings high computational efficiency and reliability. The effectiveness of the proposed algorithm is demonstrated by a particular practical application. Namely the problem of computing an H 2 -optimal inverse dynamic filter to an audio equipment is considered as it was proposed by M. Sternad and colleagues in [16] to improve behavior of moderate quality loudspeakers. Involved spectral factorization can be converted into plus-minus factorization in a special case which in turn is resolved by our new method.
3 citations
23 Mar 1986
TL;DR: It is shown by the construction that the Thompson area-time optimum bound for the VLSI computation of an N-point FFT can be attained by an alternative number representation, and hence the theoretical bound is a tight bound regardless of number system representation.
Abstract: A VLSI implementation of a Fast Fourier Transform (FFT) processor consisting of a mesh interconnection of complex floating-point butterfly units is presented. The Cooley-Tukey radix-2 Decimation-In-Frequency (DIF) formulation of the FFT was chosen since it offered the best overall compromise between the need for fast and efficient algorithmic computation and the need for a structure amenable to VLSI layout. Thus the VLSI implementation is modular, regular, expandable to various problem sizes and has a simple systolic flow of data and control. To evaluate the FFT architecture, VLSI area-time complexity concepts are used, but are now adapted to a complex floating-point number system rather than the usual integer ring representation. We show by our construction that the Thompson area-time optimum bound for the VLSI computation of an N-point FFT, area-time2oc = ORNlogN)1+a] can be attained by an alternative number representation, and hence the theoretical bound is a tight bound regardless of number system representation.
3 citations