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Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.


Papers
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Journal ArticleDOI
Li Li An1, Rong Zhu1, Yao Min Yang1, Min Xu1, Fei Chen 
TL;DR: In order to further improve the precision of harmonics measurement, the paper provides a new interpolation fast Fourier transform (FFT) algorithm based on RifeVincent (I) window that can solve the contradiction between calculation accuracy and computational speed of windowed and interpolated FFT algorithm.
Abstract: In order to further improve the precision of harmonics measurement, the paper provides a new interpolation fast Fourier transform (FFT) algorithm based on RifeVincent (I) window. By using the cubic spline function to approach the ninth multinomial of frequency modification coefficient and the function of harmonic amplitude correction of the interpolation FFT algorithm based on RifeVincent (I) window, the computing speed has been improved. It can solve the contradiction between calculation accuracy and computational speed of windowed and interpolated FFT algorithm. The simulative results show that RifeVincent (I) window interpolation algorithm by using cubic spline function has the amplitude error less than 0.00001 %, the frequency error less than 0.000001 Hz, and the phase error less than 0.01%.

1 citations

Patent
15 Oct 2003
TL;DR: In this article, the mixed digital and analogue fast discrete Fourier transformation circuit was proposed to perform transformation of analogue signal directly without converting the analogue signal into digital signal, which is simple in structure, fast and low in power consumption.
Abstract: The mixed digital and analogue fast discrete Fourier transformation circuit and mixed digital and analogue fast discrete inverse Fourier transformation circuit adopting prime number factor algorithm perform transformation of analogue signal directly without converting the analogue signal into digital signal The present invention includes the first stage of sample/holding circuit to analyze N complex number series into 2D N1*N2 series and to feed the result to the first stage of Fourier transformation circuit; the first stage of Fourier transformation circuit to perform N2 times DFT transformations of N1 length; the second sample/holding circuit to hold the result of the first Fourier transformation and feed the data to the second stage of Fourier transformation circuit; the second stageof Fourier transformation circuit to perform the N1 times length N2 DFT transformations to obtain the ultimate Fourier transformation result The present invention has no multiplying twiddle factor circuit and is simple in structure, fast and low in power consumption

1 citations

Proceedings ArticleDOI
30 Aug 2002
TL;DR: The digital implementation of fractional Fourier transform hologram (FRTH) can lead its advantages, such as flexibility of fabrication and variation with recording system parameters, to expanding its application fields in FRT and holography.
Abstract: Digital implementation of fractional Fourier transform hologram (FRTH) is studied. From the definition of fractional Fourier transform (FRT), its discrete form is obtained and then a fast FRT algorithm is generated based on fast Fourier transform (FFT). Therefore, with the algorithm whose numerical efficiency is equal to the FFT, FRT can be quickly calculated and moreover FRTCGH can be efficiently encoded and reconstructed. The digital implementation for FRTH can lead its advantages, such as flexibility of fabrication and variation with recording system parameters, to expanding its application fields in FRT and holography.

1 citations

Journal ArticleDOI
TL;DR: Binary FFT(Fast courier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi valued logic circuit using the basic circuit of the electric current mode CMOS to show the simplicity of the circuit.
Abstract: In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast courier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like {0, 1, 2, 3}. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used toed as LUT(Lood Up Table).

1 citations

Book ChapterDOI
18 Sep 2017
TL;DR: In signal processing, the Fourier transform is a popular method to analyze the frequency content of a signal, as it decomposes the signal into a linear combination of complex exponentials with integer frequencies.
Abstract: In signal processing, the Fourier transform is a popular method to analyze the frequency content of a signal, as it decomposes the signal into a linear combination of complex exponentials with integer frequencies. A fast algorithm to compute the Fourier transform is based on a binary divide and conquer strategy.

1 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20235
202224
20211
20188
201757
201692