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Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.


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Proceedings ArticleDOI
04 Sep 2013
TL;DR: Estimates show that the performance of the novel architecture designed to realize a million-bit multiplication architecture matches that of previously reported software implementations on a high-end 3 Ghz Intel Xeon processor, while requiring only a tiny fraction of the area.
Abstract: In this work we present the first full and complete evaluation of a very large multiplication scheme in custom hardware. We designed a novel architecture to realize a million-bit multiplication architecture based on the Schonhage-Strassen Algorithm and the Number Theoretical Transform (NTT). The construction makes use of an innovative cache architecture along with processing elements customized to match the computation and access patterns of the FFT-based recursive multiplication algorithm. When synthesized using a 90nm TSMC library operating at a frequency of 666 MHz, our architecture is able to compute the product of integers in excess of a million bits in 7.74 milliseconds. Estimates show that the performance of our design matches that of previously reported software implementations on a high-end 3 Ghz Intel Xeon processor, while requiring only a tiny fraction of the area.

41 citations

Journal ArticleDOI
01 May 1986
TL;DR: A new multidimensional Hartley transform is defined and a vector-radix algorithm for fast computation of the transform is developed that is shown to be faster (in terms of multiplication and addition count) compared to other related algorithms.
Abstract: A new multidimensional Hartley transform is defined and a vector-radix algorithm for fast computation of the transform is developed. The algorithm is shown to be faster (in terms of multiplication and addition count) compared to other related algorithms.

41 citations

Journal ArticleDOI
TL;DR: In this article, a fast algorithm for computing sparse Fourier transforms with spatial and Fourier data supported on curves or surfaces is proposed. But this algorithm is based on the butterfly algorithm.
Abstract: This paper introduces a fast algorithm for computing sparse Fourier transforms with spatial and Fourier data supported on curves or surfaces. This problem appears naturally in several important applications of wave scattering, digital signal processing, and reflection seismology. The main idea of the algorithm is that the interaction between a frequency region and a spatial region is approximately low rank if the product of their widths are bounded by the maximum frequency. Based on this property, we can approximate the interaction between these two boxes accurately and compactly using a small number of equivalent sources. The overall structure of the algorithm follows the butterfly algorithm. The computation is further accelerated by exploiting the tensor-product property of the Fourier kernel in two and three dimensions. The proposed algorithm is accurate and has the optimal complexity. We present numerical results in both two and three dimensions.

41 citations

Proceedings ArticleDOI
25 May 2003
TL;DR: A parallel access scheme for constant geometry FFT algorithms is proposed, which allows conflict-free access of operands distributed over parallel memory modules and the address generation is performed with the aid of bit-wise XOR operations.
Abstract: In this paper, a parallel access scheme for constant geometry FFT algorithms is proposed, which allows conflict-free access of operands distributed over parallel memory modules. The scheme is a linear transformation and the address generation is performed with the aid of bit-wise XOR operations. Different FFT lengths can be supported with the aid of a simple address rotation unit. The scheme is general supporting several radices in FFT computations and different numbers of parallel memory modules. The scheme allows parallel butterfly computations independent of the FFT length.

41 citations

Journal ArticleDOI
TL;DR: A novel architecture for memory-based fast Fourier transform (FFT) computation for real-valued signals based on radix-2 decimation-in-frequency algorithm to minimize the computation clock cycles and maximize the utilization of the processing element (PE).
Abstract: This brief presents a novel architecture for memory-based fast Fourier transform (FFT) computation for real-valued signals based on radix-2 decimation-in-frequency algorithm. A superior strategy of stage partition for the real FFT (RFFT) is proposed to minimize the computation clock cycles and maximize the utilization of the processing element (PE). The PE employed in our RFFT architecture can process four inputs in parallel by using two radix-2 butterflies and only two multiplexers. The proposed memory-addressing scheme and control of the multiplexers can be expressed in terms of a counter according to the RFFT computation stage. Furthermore, the proposed RFFT architecture can support more PEs in two dimensions as well. Compared with prior works, the proposed RFFT processors have the advantages of fewer computation cycles and lower hardware usage. The experiment shows that the proposed processor reduces the computation cycles by a factor of 17.5% for a 32-point RFFT computation compared with a recently presented work while maintaining lower hardware usage and complexity in the PE design.

41 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20235
202224
20211
20188
201757
201692