Topic
Prime-factor FFT algorithm
About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.
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14 Mar 2010
TL;DR: The new algorithm, called mimetic wavelet-packet based (MWPB) algorithm, generalizes the WPB algorithm and presents better estimation and tracking performances than existing wavelets-based sparse response identification algorithms.
Abstract: This paper proposes a new wavelet-packet transform based adaptive algorithm for sparse response identification. The distinctive features of the new algorithm are the on-line adaptability of the discrete wavelet packet transform (DWPT) and an efficient weight deactivation/activation schedule. The new algorithm, called mimetic wavelet-packet based (MWPB) algorithm, generalizes the WPB algorithm presented in [1]. The MWPB algorithm presents better estimation and tracking performances than existing wavelet-based sparse response identification algorithms. Monte Carlo (MC) simulation results compare the performances of the four most recently proposed algorithms in this class.
23 Mar 1992
TL;DR: It is shown that the PFA has an intrinsic property that allows it to be easily realized in an in-place and in-order form and the conditions under which a particular sequence length is possible for a natural in-places and in order PFA computation are analyzed.
Abstract: For the computation of the prime factor algorithm (PFA), an in-place and in-order approach is always desirable because it reduces the memory requirement for the storage of the temporary results, and the computation time which is required to unscramble the output sequence to a proper order. In fact, the processing time required for this unscrambling process can take up as much as 50% of the overall computation time. It is shown that the PFA has an intrinsic property that allows it to be easily realized in an in-place and in-order form. No extra operation is required as in the previous propositions. Nevertheless, the sequence length of the PFA computation must be carefully selected. The conditions under which a particular sequence length is possible for a natural in-place and in-order PFA computation are analyzed. The result is useful to both the hardware and software realization of the PFA. >
04 Dec 2005
TL;DR: An estimate has been made of number of modes, which need to be considered for accurate results in the Body of Revolution electromagnetic scattering problem employing Fast Fourier Transform (FFT), thereby increasing the efficiency of the BOR-FFT program due to the reduced number of unknowns without compromising the accuracy.
Abstract: An estimate has been made of number of modes, which need to be considered for accurate results in the Body of Revolution (BOR) electromagnetic (EM) scattering problem employing Fast Fourier Transform (FFT) This way, we don't have to solve unnecessarily BOR EM scattering problems for large number of modes consuming a large CPU memory and time We need to solve the BOR EM scattering problem up to a specific number of modes thereby increasing the efficiency of the BOR-FFT program due to the reduced number of unknowns without compromising the accuracy
Journal Article•
TL;DR: An efficient radix-2 FFT architecture using CORDIC algorithm for FPGA implementation of FFT using a new addressing scheme and the angle generator logic in order to remove the ROM usage to store twiddle factors.
Abstract: In this paper, we proposed an efficient radix-2 FFT architecture using CORDIC algorithm for FPGA implementation of FFT. CORDIC algorithm is used for twiddle factor multiplication; it will reduce the computation time and make faster processor. The proposed algorithm uses a new addressing scheme and the angle generator logic in order to remove the ROM usage to store twiddle factors. The CORDIC algorithm offers opportunity to calculate all the functions in a simple and elegant fashion. By using only additions and shift operations CORDIC algorithm calculates the rotation of a vector and it is an iterative algorithm. The design architecture is written in verilog HDL code using Modelsim and XILINX ISE 14.2 tools.
TL;DR: A new fast Fourier transform (FFT) algorithm to reduce the table size of twiddle factors required in pipelined FFT processing and a new dynamic data scaling approach is presented to reduce hardware complexity without degrading signal-to-quantization-noise ratio (SQNR).
Abstract: In this paper, we present a new fast Fourier transform (FFT) algorithm to reduce the table size of twiddle factors required in pipelined FFT processing. The proposed algorithm can reduce the table size to half, compared to the radix-22 algorithm, while retaining the simple structure. In addition, a new dynamic data scaling approach is presented to reduce hardware complexity without degrading signal-to-quantization-noise ratio (SQNR). To verify the proposed algorithm, a 2048-point pipelined FFT processor is designed using a 0.18 m CMOS process. By combining the proposed algorithm and the radix-22 algorithm, the table size is reduced to 35% and 53% compared to the radix-2 and radix-22 algorithms, respectively. The FFT processor occupies 1.95 mm2 and achieves SQNR of more than 55 dB without increasing the internal w rdlength progressively using the proposed dynamic data scaling.