Prime-factor FFT algorithm

About: Prime-factor FFT algorithm is a research topic. Over the lifetime, 2346 publications have been published within this topic receiving 65147 citations. The topic is also known as: Prime Factor Algorithm.

A pipelined architecture for normal I/O order FFT

Abstract: We present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order A single-path delay commutator processing element (SDC PE) has been proposed for the first time It saves a complex adder compared with the typical radix-2 butterfly unit The new pipelined architecture can be built using the proposed processing element The proposed architecture can lead to 100% hardware utilization and 50% reduction in the overall number of adders required in the conventional pipelined FFT designs In order to produce the output sequence in normal order, we also present a bit reverser, which can achieve a 50% reduction in memory usage

A Memory-Based FFT Processor Design With Generalized Efficient Conflict-Free Address Schemes

Abstract: This paper presents the design and implementation of memory-based fast Fourier transform (FFT) processors with generalized efficient, conflict-free address schemes. We unified the conflict-free address schemes of three different FFT lengths, including the single-power points, the common nonsingle-power points, and the nonsingle-power points applied with a prime factor algorithm. Though the three cases differ in terms of decomposition, they are all compatible with memory-based architecture by the way of the proposed address schemes. Moreover, the decomposition algorithm utilizes a method, named high-radix–small-butterfly (HRSB), to decrease the computation cycles and eliminate the complexity of the processing engine. In addition, an efficient index generator, a simplified multipath delay commutator engine, and a unified Winograd Fourier transform algorithm butterfly core were also designed. We designed two FFT examples in long-term evolution system to verify the availability of the address scheme, including a 2n (128–2048)-point FFT unit and a 35 different point (12–1296) DFT unit. Compared with previous works with similar address schemes, this paper supports more generalized lengths and achieves more flexible throughput.

Self-sorting in-place fast fourier transforms

Abstract: It has recently been shown that the familiar radix-2 Fast Fourier Transform (FFT) algorithm can be made both self-sorting and in-place—two useful properties which were previously thought to be mutually exclusive. In this paper the procedure is demonstrated and it is shown how it can be extended toradix-3, radix-4, radix-5, and finally to mixed-radix FFTs. These new versions of the FFT algorithm require neither an unscrambling step nor work space. Implementation on vector computers (for the case of multiple transforms) is discussed. Timing experiments on the Cray X-MP demonstrate that these new variants of the FFT run just as fast as older self sorting routines which required work space.

An improved windowed Fourier transform for fringe demodulation

Abstract: A modified algorithm of windowed Fourier transform (WFT) for phase retrieval from electronic speckle-shearing fringe patterns with carriers is proposed. The algorithm is based on the introduction of a fast Fourier transform (FFT) in WFT to reduce computation time for fringe demodulation. Since boundary effects in FFT will influence the accuracy of phase retrieval, the Gerchberg method is employed to extrapolate the fringe pattern at the boundaries to reduce boundary effects. A theoretical analysis of the algorithm is presented. Both simulated and experimental results show that the proposed method has reduced the computation time significantly compared with the convolution method of WFT without sacrificing measurement accuracy.