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Showing papers on "Process corners published in 1989"


Patent
13 Oct 1989
TL;DR: In this paper, a bipolar/CMOS regulator circuit for generating a CMOS gate-controlling voltage, which varies favorably with temperature, power supply voltage and process corner, is presented.
Abstract: A bipolar/CMOS regulator circuit for generating a CMOS gate-controlling voltage, which varies favorably with temperature, power supply voltage and process corner so as to yield a well-controlled CMOS current includes a bipolar bandgap regulator circuit portion (12) and a conversion circuit portion (14). The conversion circuit portion (14) is formed of a current mirror section (18), a current source section (20) and an output section (22).

24 citations


Patent
13 Oct 1989
TL;DR: A bipolar/CMOS ECL-to-CMOS conversion circuit for receiving ECL differential input signals and for converting the ECL input signals to CMOS complementary output signals is described in this paper.
Abstract: A bipolar/CMOS ECL-to-CMOS conversion circuit for receiving ECL differential input signals and for converting the ECL input signals to CMOS complementary output signals, includes, a first output stage (20), a second output signal (22), a first base drive circuit (24), a second base drive circuit (26), a third base drive circuit (28), and a fourth base drive circuit (30). The first and second output stages are formed of bipolar transistors, and the first through fourth base drive circuits ar formed of CMOS transistors. The bipolar transistors and CMOS transistors are merged in a common semiconductor substrate in order to form the conversion circuit which has high current drive capabilities and low propagation delay regardless of variations in temperature and process corners.

7 citations


Patent
11 May 1989
TL;DR: A semiconductor integrated circuit device (IC1) as mentioned in this paper is constructed such that an n-number of high-speed side circuit blocks (1-1 to 1-n) having a circuit structure of ECL (Emitter Coupled Logic) type and n − number of low-speed (1 − 1′ to 1 − n) having an ECL circuit type are integrated in a common semiconductor substrate (SUB).
Abstract: A semiconductor integrated circuit device (IC1) is constructed such that an n-number of high-speed side circuit blocks (1-1 to 1-n) having a circuit structure of ECL (Emitter Coupled Logic) type and n′-number of low-speed side circuit blocks (1-1′ to 1-n′) having a circuit structure of Bi-CMOS (Bipolar Complementary Metal-Oxide Semiconductor) type are integrated in a common semiconductor substrate (SUB). The two kinds of circuit blocks (1-1 to 1-n; 1-1′ to 1-n′) have identical or similar functions, though having different circuit structures determining their operating speeds.