Topic
Process corners
About: Process corners is a research topic. Over the lifetime, 912 publications have been published within this topic receiving 9116 citations.
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11 May 2016TL;DR: In this paper, the authors describe a system, a circuit, and a method for process and temperature compensation in an integrated circuit, which includes a bus, a data latch and a voltage generator.
Abstract: The present disclosure describes a system, a circuit, and method for process and temperature compensation in an integrated circuit. For example, the system includes a bus, a data latch, and a voltage generator. The data latch includes a plurality of transistors coupled to the bus. The voltage generator includes a tracking transistor with one or more physical characteristics that substantially match one or more respective physical characteristics-e.g., gate width and gate length dimensions-of at least one of the plurality of transistors in the data latch. The voltage generator is configured to adjust a pre-charged voltage on the bus based on an electrical characteristic of the tracking transistor.
3 citations
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29 Jun 2016
TL;DR: In this article, a DRAM back-end testing yield improvement method is presented, where a plurality of clock vibrators are arranged in DRAM chips to check whether a process corner of the chip is fast or slow, and a power supply voltage of the clock vibrator is generated by an internal voltage generator.
Abstract: The present invention provides a DRAM back-end testing yield improvement method. The method comprises: firstly, arranging a plurality of clock vibrators in a DRAM chip, wherein the clock vibrator is used for checking whether a process corner of the chip is fast or slow, and a power supply voltage of the clock vibrators is generated by an internal voltage generator of a DRAM; next, during a front-end test, adjusting trimming codes of voltages VINT, VPP and VBLH, and separately monitoring a cycle of an output clock of each clock vibrator that is supplied with power based on the voltage; when the cycle of the output clock reaches a target value, selecting a corresponding set of trimming codes as final voltage trimming codes of the DRAM chip; and finally, setting the obtained voltage adjustment codes into the DRAM chip. According to the method provided by the present invention, with the effect of the process corner of the chip on the test considered, and by adjusting the trimming codes, the cycle of the output clocks of all chips on a whole sheet of wafer all approaches to an expected value, so that it can be ensured that a related interface time sequence and storage performance parameter of the DRAM chip can both meet an SPEC range in a back-end test.
3 citations
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01 Oct 2016TL;DR: A novel process corner detection circuit uses only metal-oxide-semiconductor (MOS) transistors to precisely detect process corner and can be modified to monitor not only parameter variation of n-type and p-type transistors, but also their combinations.
Abstract: A novel process corner detection circuit has been proposed in current work. The circuit uses only metal-oxide-semiconductor (MOS) transistors to precisely detect process corner. Such approach allows reducing circuit's area and current consumption. Information on corner is represented in digital form (code), which allows easily using the digital signal for both testing and compensation of process variation (PV) in other blocks. The circuit can be modified to monitor not only parameter variation of n-type and p-type transistors, but also their combinations.
3 citations
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TL;DR: The working of a differential delay circuit under process, voltage and temperature is described and an almost identical behavior with the no skew data in post-layout is indicated.
3 citations
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22 Mar 2000TL;DR: In this article, a first circuit, a second circuit, and a third circuit are configured to generate a first signal having a first frequency and a second signal with a second frequency that is generally a function of a process variation.
Abstract: An apparatus including a first circuit, a second circuit, and a third circuit. The first circuit may be configured to generate a first signal having a first frequency. The second circuit may be configured to generate a second signal having a second frequency that is generally a function of a process variation. The third circuit may be configured to control a process variation sensitive parameter in response to the first and second signals.
3 citations