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Process corners

About: Process corners is a research topic. Over the lifetime, 912 publications have been published within this topic receiving 9116 citations.


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Proceedings ArticleDOI
26 Jul 2021
TL;DR: In this paper, an integrated filter's self-tuning circuit based on time-constant detection for series-and parallel-connected resistor banks (SPRB) with discrete-step control is investigated and validated.
Abstract: In this article, an integrated filter’s self-tuning circuit based on time-constant detection for series- and parallel-connected resistor banks (SPRB) with discrete-step control is investigated and validated. Process, voltage and temperature compensation using SPRB structures can greatly reduce the layout area of the resistor tuning bank, while maintaining the same tuning range and maximum control step compared to the more classic structures of the tuning banks, such as series, parallel or R-2R. The proposed self-tuning circuit implements a two-step search approach and signal delay compensation to achieve precise tuning results for the filter using SPRB structure. Mean value of bandwidth variation equal to 1.4% is achieved at all process corners and temperatures ranging from −40°C to 80°C. The self-tuning circuit was validated with a reconfigurable 6th order low-pass filter, and designed using 65nm CMOS process, while using a 1.2 V supply.
Journal ArticleDOI
TL;DR: In this paper , a high-precision RC oscillator circuit that is less affected by temperature and supply voltage is presented. But the circuit mainly consists of a bandgap reference voltage source, a lowvoltage linear regulator, and a low-pass filter, which reduces the circuit's sensitivity to temperature variations and achieves high stability of the oscillator frequency over a wide temperature range.
Abstract: This paper introduces a high-precision RC oscillator circuit that is less affected by temperature and supply voltage. The circuit mainly consists of a bandgap reference voltage source, a low-voltage linear regulator, a low-pass filter, and a digital trim circuit, which reduces the circuit's sensitivity to temperature variations and achieves high stability of the oscillator frequency over a wide temperature range. Because of the current digital trimming technique, the circuit's ability to cope with the effects of frequency instability caused by process deviations is further enhanced.The simulation results show that the output center frequency accuracy is maintained within ±0.5% under the supply voltage range of 2.5V~5.5V, temperature range of -40?~125?, and different process corners. The RC oscillator has a high precision output frequency and can be used as a clock signal for a number of highly integrated and high precision applications.
Posted ContentDOI
01 Jul 2022
TL;DR: In this article , a four-stage ring VCO architecture with a new differential delay stage utilizes the dual delay path scheme to achieve high oscillation frequency, low power dissipation, and low phase noise.
Abstract: Abstract This paper reports a design of the most significant electronic circuit used in modern wireless and optical communications systems, known as voltage-controlled oscillator (VCO). A variable delay stage is a core element of ring VCO and in this work, a new differential delay stage based on the inductive shunt peaking technique using active inductors (AI) is presented to increase the ring VCO’s frequency bandwidth. The presented four-stage ring VCO architecture with a new differential delay stage utilizes the dual delay path scheme to achieve high oscillation frequency, low power dissipation, and low phase noise. The proposed VCO circuit is designed and simulated in a 180 nm TSMC CMOS process and 1.8 V supply voltage ( V dd ). The VCO generates an output frequency range from 2.876 GHz to 2.039 GHz (34.05%) for 0 V to 1 V variation in control voltage ( V c ). The designed VCO circuit's power dissipation ranges from 3.289 mW to 2.888 mW, and its phase-noise at 1 MHz offset frequency is -108.9 dBc/Hz. The VCO exhibits figure of merit is -171.9 dBc/Hz and a layout area of 1148.67 µm 2 .
Journal ArticleDOI
TL;DR: In this article, a shunt-regulation control technique was proposed to improve the load transient performance of fully integrated high-frequency converters, which reduced the undershoot voltage from 360 to 100 mV with a transient step of 150-550 mA in 100 ps.
Abstract: A shunt-regulation control technique is presented to improve the load transient performance of fully integrated high-frequency converters. The undershoot voltage, which used to be limited by the system loop response and the nanofarad range small on-chip capacitor, is significantly suppressed. The proposed converter is simulated by a standard 0.13 μm CMOS process using a 6 nH inductor and 10 nF capacitor under different process corners with parasitics extracted from the layout of critical blocks. Compared to a conventional converter with the bandwidth pushed to the limit, the undershoot voltage is reduced from 360 to 100 mV with a transient step of 150–550 mA in 100 ps.

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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202311
202226
202138
202047
201943
201864