Process corners

About: Process corners is a research topic. Over the lifetime, 912 publications have been published within this topic receiving 9116 citations.

Subthreshold Delay Variation Model Considering Transitional Region for Input Slew

Abstract: Subthreshold design provides the promising advantage of low power consumption at the cost of performance variation and even circuit failure. An accurate and efficient statistical timing model is crucial for timing analysis and performance optimization guidance. Prior works lack the consideration of the impact of slew time or the transitional region for input slew due to process variation and efficient approaches considering the impact of load capacitance and multiple process variations in complex gates, resulting in accuracy loss. In this work, an accurate end efficient gate delay variation model is analytically derived for various input slews and load capacitances. The transitional region between fast and slow input slew is efficiently partitioned with an adaptive error tolerance method so as to characterize timing variation by linear interpolation based on that for fast and slow input slew. In order to consider the impact of load capacitance, the relation between the sensitivity of step delay and the dominant threshold voltage variation is analytically derived. For complex gates, the multiple process variations for both parallel and stacking structures are equivalently expressed by threshold voltage variation from each transistor. The proposed model has been validated under advanced TSMC (Taiwan Semiconductor Manufacturing Company) 12 nm technology at subthreshold region and achieves excellent agreement with Monte Carlo SPICE (Simulation Program with Integrated Circuit Emphasis) simulation results with the max error less than 6.49% for standard deviation of gate delay and 4.63%/6.40% for max/min delay, demonstrating over 4 times precision improvement compared with competitive analytical models.

Design of Voltage Level Shifter Using CNTFET and Analysis of Process Voltage Temperature Variation

Abstract: In this work, we have presented the design of voltage level shifter using carbon nanotube field effect transistors (CNTFETs). The proposed design is capable of converting two input voltage levels to two output voltage levels. The threshold voltage of CNTFETs is suitably chosen to achieve the desired output. The proposed design can perform both up and down shifting which is very useful in the system-on-a-chip design to interface with other peripherals. It exhibits lower delay and power delay product in comparison with the existing complementary metal–oxide–semiconductor-based voltage level shifters. The proposed circuit is very effective as it eliminates the requirement of additional voltage level shifter for designing systems with multi-power supply voltage domain in the nanoscale regime. The design has been analyzed for different process, voltage and temperature corners. It has been shown that the design works perfectly with [Formula: see text] variation in the diameter of the carbon nanotubes used in the CNTFET. The performance varies slightly with [Formula: see text] variation in operating voltage. Our analysis shows that the design is thermally stable for a wide variation in operating temperature.

A Fully-Integrated Relaxation Oscillator with No Reference Voltage for IoT Applications

Abstract: The research direction of this paper is a chip oscillator circuit for IoT equipment. This circuit can effectively reduce the impact of power supply voltage on frequency stability, improve stability and reduce area and power consumption without additional voltage. Moreover, this Relaxation oscillator is 0.18 μ Designed in the BCD process. The power supply voltage range is from 2.7V to 5V. The simulation results show that the maximum frequency change relative to the power supply voltage is 0.65%. It has excellent performance.

A high-performance current sensing circuit with full-phase sampling capability

Abstract: A high-performance current sensing circuit with full-phase sampling capability is presented in this paper, which is suitable for DC-DC converters, motor driver circuits, and other control systems requiring current sensing. The proposed structure comprises of three parts, which are level shift, phase identification, and signal rectification. No matter what the phase of the current is, the current sensing circuit in this paper can accurately obtain the current information. Based on a standard 0.35um BCD process, the proposed current sensing circuit has been validated at different temperature points and process corners. The results demonstrate that the circuit can sense full-phase currents within ±1.5% accuracy.

A novel sub-1 volt bandgap reference with all CMOS

Abstract: This paper deals with the design of novel sub-1-V bandgap reference circuit using only MOS transistors in 0.18 µm CMOS technology, for a supply voltage of 1.8V. The circuit produces a voltage reference of 466.5 mV at 27°C with a temperature coefficient of 28.4 ppm/°C in the range of -20 to +120°C. The power supply rejection of circuit is -30 dB at 8 KHz and this rejection further increase to -50 dB at 10 KHz. Power dissipation is 3.98 µW. The circuit is also tested at four process corners. Circuit is simulated with Eldo SPICE.