Process corners

About: Process corners is a research topic. Over the lifetime, 912 publications have been published within this topic receiving 9116 citations.

Noise detector and semiconductor integrated circuit

Abstract: PROBLEM TO BE SOLVED: To detect noise generated in a semiconductor integrated circuit without bringing a probe directly in contact with a semiconductor integrated circuit even when an exclusive pad for detecting noise is removed. SOLUTION: An oscillator 2 composed of a ring oscillator or a voltage controlled oscillator is mounted on the semiconductor integrated circuit 1 having a digital circuit and an analog circuit, and a jitter value from the oscillator 2 is measured by a jitter measuring circuit 3, so that a substrate current generated due to the ON/OFF of the digital circuit can be caught. COPYRIGHT: (C)2003,JPO

Study of circuit sensitivity to interconnect variation

Abstract: Deep submicron technology makes interconnect one of the main factors determining the circuit performance. Previous work shows that interconnect parameters exhibit a significant amount of spatial variation. In this work, we present a methodology to study the influence of the interconnect variation on circuit performance. Parameterized interconnect modeling technology is introduced, and a ring oscillator circuit with interconnect dominant loading is studied.

Semiconductor integrated circuit and method of manufacturing the same.

Abstract: In a semiconductor integrated circuit wherein a bipolar transistor and an insulated gate type complementary transistor are formed on a single semiconductor chip, the insulated gate type complementary transistor is formed in an island-shaped epitaxial layer (4) which is completely isolated from a semiconductor substrate (1) and the other part of the circuit and which has a conductivity type (N) opposite to that (P) of the semiconductor substrate, and an electrode (176) is formed in contact with a region (62) for isolating the islandshaped epitaxial layer from the other part of the circuit. In the semiconductor integrated circuit, since the CMOS circuit is formed in the island-shaped epitaxial layer isolated completely from the semiconductor substrate and the other part of the circuit, noise occurring in the CMOS circuit does not adversely affect the bipolar circuit. Thus, the operation margin of the semiconductor integrated circuit is increased, and the malfunction of the circuit can be prevented.

A Linear Comparator-Based Fully Digital Delay Element

Abstract: A linear delay element is proposed in 0.18 µm CMOS technology with a power supply of 1.8V. The proposed delay element maintains linearity over a relatively large input voltage range of 1.2V and its delay range (sensitivity) can be tuned through a bias voltage. Its power dissipation is 50a#x03BC;W at a clock frequency of 1GHz and its robustness in different process corners has been shown through simulations. Additionally, a 6-bit 107MS/s Fully Digital ADC with 1.2 V input range has been implemented using the proposed delay element. The simplicity of design and functioning of the proposed delay element contributes to its improved power and energy consumption.