Showing papers on "Proximity effect (electron beam lithography) published in 1978"

A Three-Dimensional Study of the Absorbed Energy Density in Electron-Resist Films on Substrates

Abstract: A computer program has been developed for the three-dimensional calculation of the absorbed energy density in polymer films on substrates in electron beam lithography. In this calculation the Monte Carlo results have been used for the radial energy intensity distribution for a point source electron beam. The program is based on the reciprocity principle proposed by Chang. Some exposure experiments have been conducted with an electron resist of PMMA (polymethyl methacrylate) for isolated patterns in the from of a line of finite length (8.1 µm) as well as of a rectangle (3.1×8.1 µm2) in order to check the reliability of the calculations. Operating beam voltages used for the investigation are 14 and 20 keV. The electron resist thickness is 8000 A. Relatively good agreement has been obtained between the calculated and the experimental results. This program is applicable to an arbitraty pattern, and therefore it will be useful for investigations of the proximity effect in electron beam lithography.

Electron-beam fabrication of submicron gates for GaAs FET's

Abstract: High‐performance GaAs FET’s with nominal gate lengths of 0.5, 0.75, and 1.0 μm have been fabricated with electron‐beam‐lithography techniques. A hybrid process was developed which only required e‐beam definition of the critical gate level and was otherwise compatible with the fabrication process developed for conventional optically defined gates. The source–drain metallization mask was modified to include alignment marks for the gate level and the source–drain metallization was augmented to give marks after alloying with acceptable secondary electron contrast against the GaAs background: ±2000 A registration was routinely achieved over the 80×80 mil2 field. A test pattern which could be examined optically with rapid turnaround to determine the proper exposures for the various gate lengths was employed. The pattern evaluation was confirmed by resist exposure studies in conjunction with SEM examination. Evaluation of the test pattern together with corrections for the GaAs substrate backscatter and proximity effect allowed control of the gate lengths to ±10% over the entire slice. The gates were tapered at the mesa edge to prevent constriction of the resist over the step. The resist used was polymethyl methacrylate (PMMA) with a nominal thickness of 7500 A and the developed pattern served as the lift‐off mask for 4000–5000 A of aluminum gate metallization. The nominal slice size used for these runs was slightly greater than 1 cm2 (420×420 mil2) and up to 588 devices were patterned in a single pumpdown. The exposure time required per slice, including stage step and alignment, was six minutes. Both small signal and power GaAs FET’s have been fabricated with e‐beam defined gates. Small signal devices with 0.75μm gate lengths had 2.0 dB minimum noise figures with 10 dB gain at 9 GHz. Power devices with 4800‐μm total gate width and 1‐μm gate length had up to 4.1 W output power at 8 GHz with 4 dB gain.

Proximity Effect Correction In Vector-Scan Electron-Beam Lithography

Abstract: The proximity effect in electron-beam lithography describes enhanced resist exposure due to electron scattering in the resist and backscattering from the substrate. Since good edge definition requires high resist contrast, the proximity effect can substantially alter developed pattern shapes and fidelities. This effect increases as pattern sizes decrease and becomes rather severe for submicrometer geometries. We have explored methods of compensating for the proximity effect in submicrometer patterns exposed on a vector-scan exposure system. This paper discusses two approaches which can be utilized to process figure specifications prior to exposure time to compensate for the proximity effect. We also show how these approaches fit into an overall program of pattern specification and exposure.© (1978) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Proximity effect in beam-addressed metal-oxide semiconductor memory

Abstract: Electron scattering in a semiconductor target of a an electron‐beam‐addressed MOS memory can result in proximity effects between a number of adjoining memory locations (bits). As bit spacings decrease, there can be significant unintended charge accumulation in regions unirradiated by the electron beam. This can set a limit to usable bit packing density in the memory.

MOS LSI Fabrication Process Using Direct Electron Beam Writing

Abstract: A procedure to construct an MOS LSI fabrication process, using direct electron beam writing technology, has been proposed. Positive resist PMMA and aluminum liftoff technique are used. Proximity effect and resist thickness dependence, as well as line width and undercut profile of resist patterns, play important roles in determination of optimum patterning condition. Electron beam radiation damage can be annealed out by suitable heat-treatment, while the amount of damage depends on processing steps. The process also includes a plasma etching with improved gas composition, a two-step glass flow technique and molybdenum wet etching with newly developed solution. Successful fabrication results, 1-kbit MOS RAM and TEG with 2 µm minimum pattern dimension, demonstrate the validity of these processes.