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Proximity effect (electron beam lithography)

About: Proximity effect (electron beam lithography) is a research topic. Over the lifetime, 940 publications have been published within this topic receiving 8508 citations.


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Patent
04 Jul 2003
TL;DR: In this article, a method for manufacturing a photo mask is provided to be capable of improving the pattern printing efficiency at wafer level by forming an OPC(Optical Proximity Correction) pattern of the photo mask into a bar type structure.
Abstract: PURPOSE: A method for manufacturing a photo mask is provided to be capable of improving the pattern printing efficiency at wafer level by forming an OPC(Optical Proximity Correction) pattern of the photo mask into a bar type structure. CONSTITUTION: An OPC pattern(23) for excluding the optical proximity effect generated at the end portion of long axis of a shielding pattern, is formed into a bar type structure having a long axis(24) and a short axis(25). At this time, the short axis has a size of 0.8 times of that of the wavelength of a wafer exposure apparatus, or less, and the long axis has a size of 3 times of that of the short axis, or larger. Preferably, the OPC pattern is formed into a pattern type structure by using material, or is formed into a hole type structure for exposing a mask substrate(21).

1 citations

Patent
12 Aug 2004
TL;DR: In this article, a reticle 11 made of a glass substrate as a photomask is provided with a light shielding film pattern relating to formation of elements and integrated circuits on a semiconductor wafer as well as an auxiliary pattern 13 which corrects degeneracy of lines due to influences of the optical proximity effect during exposure in an isolated pattern P1 in at least a sparse pattern region.
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a photomask and a pattern by which degeneracy of lines in an isolated fine exposure pattern can be easily improved and reliability is improved, and to provide a semiconductor device. SOLUTION: A reticle 11 made of a glass substrate as a photomask is provided with a light shielding film pattern 12 relating to formation of elements and integrated circuits on a semiconductor wafer as well as with an auxiliary pattern 13 which corrects degeneracy of lines due to influences of the optical proximity effect during exposure in an isolated pattern P1 in at least a sparse pattern region, as shown in Figures (a) and (b). The auxiliary pattern 13 comprises a pattern for correcting the optical proximity effect by engraving a specified region of the reticle 11 in such a manner that the pattern is parallel to at least a specified line part. The auxiliary pattern 13 forms an etching region where the profile of light to compensate the diffracted part of light on the line edge is controlled as shown in Fig. (c). COPYRIGHT: (C)2004,JPO&NCIPI

1 citations

Patent
Fletcher Jones1
20 Sep 1983
TL;DR: In this paper, a lithographic exposure pattern is modified by moving or setting back the edges of each central part away from the perimeter part which surrounds it to form a nominally unexposed band separating each central body part from the surrounding body part.
Abstract: Proximity effect is reduced or eliminated by breaking each shape of a lithographic exposure pattern into two parts, a perimeter part having a width on the order of the lithographic exposure pattern minimum linewidth and the remaining central part or parts (if any) which are completely surrounded by the perimeter part. Figure 2 shows the edge parts hatched and the centre part blank. The lithographic exposure pattern is then modified by moving or setting back the edges of each central part away from the perimeter part which surrounds it (similar to reducing the size of the central part) to form a nominally unexposed band separating each central part from the perimeter part which surrounds it. This is shown in Fig. 3. The width of the nominally unexposed band in the modified exposure pattern is preferably chosen as large as possible so long as the condition is met that upon developing a radiation sensitive layer directly exposed to the modified exposure pattern, the nominally unexposed band develops (i.e., dissolves, resists dissolution, or is otherwise modified) substantially as if it were also exposed. The nominally unexposed band is exposed, in fact, by electrons scattered from the directly exposed part(s) of the shape (the perimeter part plus the central part, if any). The width of the nominally unexposed band is preferably about twice the edge bias applied to outside edges of each shape.

1 citations

Proceedings ArticleDOI
14 Jun 1988
TL;DR: In this paper, the deposited energy density profile by a double gaussian Exposure Intensity Distribution (EID ) function was evaluated and the theoretical and experimental results showed that in a 2.2 micron thick trilayer planerizing resist system, both 0.5 micron isolated line and isolated space were simultaneously resolved in half micron top layer resist.
Abstract: Direct write electron beam (EB) lithography is expected to write a very fine wafer pattern below half micron for the development of the comming generation ULSIs. But direct write EB lithography has two main peculiar problems for obtaining such a very fine resist pattern on an uneven topography of a processed wafer. One is a pattern dimension deviation from the designed value due to resist topography and proximity effects. The other problem is pattern registration deviation due to charge-up in the EB-resist. In order to investigate the proximity effect. we evaluated the deposited energy density profile by a double gaussian Exposure Intensity Distribution ( EID ) function. The theoretical and experimental results showed that in a 2.2 micron thick trilayer planerizing resist system. both 0.5 micron isolated line and isolated space were simultaneously resolved in half micron thick top layer resist. To compensate the charge-up problem, we treated the bottom-layer by a brand-new ion shower material modification process. A 40 KV proton shower irradiation decreased the resistance of the bottom layer. The charge of the electron beam was dissipated through the bottom layer resist. The resultant half micron rule 16 M-bit DRAM patterns were compared with the optically exposed tri-level resist patterns. The optically exposed patterns also had an optical proximity effect and half micron patterns were not resolved even adopting the contrast enhancement lithographic ( CEL ) technology. On the other hand, we successfully obtained 16M-bit DRAM patterns on the uneven topography of the processed wafer using EB direct write.

1 citations

Journal ArticleDOI
TL;DR: In this paper, the most advanced VLSI device, realized by a high performance stepper with the conventional optical techniques, is realized by high voltage electron beam (EB) technique, and fabricated 0.25 μm line and space by a single scan at 50kV.
Abstract: 1Mbit D-RAM. the most advanced VLSI device, is realized by a high performance stepper with the conventional optical techniques. However, as the optical lithography has an inherent limit of resolution, new technologies are being developed rapidly for the development of new generation VLSI devices (4M-16Mbit D-RAM) using shorter wavelength photons of i-line. Electron beam (EB) lithography is already in practical mask making products, but the resolution limit is about 0.5 μm because of proximity effects. In order to make higher resolution and higher precision masks, high voltage EB technique is being developed to minimize the proximity effect, and fabricated 0.25 μm line and space by a single scan at 50kV. X-ray technology 1; becoming practical after a long laboratory-level study, using high performance X-ray resists (CPMS: chlorinated polymetylstylene). Focused Ion Beam (FIB) technology has been anticipated for its capability of submicron lithography due to a reduced proximity effect. High speed submicron Si MOSFET and GaAs MESFET with 0.25 μm gate have been fabricated using FIB technology. Activities of submicron lithography technology in Japan (optical stepper, EB, X-ray, and FIB) are described.

1 citations


Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202316
202234
20214
20206
20194
20186