Showing papers on "Pulse-frequency modulation published in 2004"

A 4-/spl mu/a quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications

Abstract: This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm/sup 2/ in 0.25-/spl mu/m CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 /spl mu/A.

Maximum constant boost control of the Z-source inverter

Abstract: This paper proposes two maximum constant boost control methods for the Z-source inverter, which can obtain maximum voltage gain at any given modulation index without producing any low-frequency ripple that is related to the output frequency. Thus the Z-network requirement will be independent of the output frequency and determined only by the switching frequency. The relationship of voltage gain to modulation index is analyzed in detail and verified by simulation and experiment.

A carrier-based PWM method for three-phase four-leg voltage source converters

Abstract: In this paper a voltage modulation method based on a triangular carrier wave for the three-phase four-leg voltage source converter is described. The four-leg converter can produce three output voltages independently with one additional leg. The proposed modulation method for the four-leg converter can be implemented with a single carrier by a simple but useful "offset voltage" concept. The method is equivalent to the so called three-dimensional space vector PWM method, but its implementation is much easier. The maximum magnitude of the balanced three-phase voltage and the maximum magnitude of zero sequence voltage, which can be synthesized simultaneously, are derived. The feasibility of the proposed modulation technique is verified by computer simulation and experimental results. These results show that a proposed carrier-based pulsewidth modulation (PWM) technique can be easily implemented without conventional computational burden.

Optimal common-mode Voltage reduction PWM technique for inverter control with consideration of the dead-time effects-part I: basic development

Abstract: The objective of this paper is to investigate the optimal common-mode voltage reduction pulsewidth modulation (PWM) technique when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one-third for the inverter with diode front end, which is widely used in industry. Intensive measured results are presented to fully support the claims.

The generalized discontinuous PWM scheme for three-phase voltage source inverters

Abstract: This paper presents analytical techniques for the determination of the expressions for the modulation signals used in the carrier-based sinusoidal and generalized discontinuous pulse-width modulation schemes for two-level, three-phase voltage source inverters. The proposed modulation schemes are applicable to inverters generating balanced or unbalanced phase voltages. Some results presented in this paper analytically generalize the several expressions for the modulation signals already reported in the literature and new ones are set forth for generating unbalanced three-phase voltages. Confirmatory experimental and simulation results are provided to illustrate the analyses.

Evaluation of modulation schemes for three-phase to three-phase matrix converters

Abstract: This paper presents a method for evaluating different modulation schemes employed with three-phase to three-phase matrix converters. The evaluation method addresses three important modulator characteristics: the output waveform quality, the input waveform quality and the switching losses associated with the modulation schemes. The method is used to evaluate four different modulation strategies, all based on the direct space-vector modulation approach. Further, regarding the switching losses, the paper proposes a new space-vector approach by which the switching losses can be reduced by 15%-35%, depending on the output load angle. This new modulation approach is applicable whenever the output voltage reference is below half the input voltage and the output voltage quality is then superior to that of the conventional space vector modulation scheme. The functionality of the new modulation scheme is validated by both simulations and experimental results and compared to waveforms obtained by using exiting space vector modulation schemes. The output voltage of the proposed scheme turns out to be comparable to the best of the conventional schemes while the input current is more distorted.

Pulse frequency modulation for induction charge device

Abstract: The present invention is related to a pulse frequency modulation for induction charge device, which comprises a pulse frequency modulation for induction charge device being provided to charge a portable electronic device, wherein, the portable electronic device comprises a induction coil, which comprises: an electric magnetic field generate and the secondary coil react circuit; a detection and modulation generate circuit; and a control switch circuit; whereby, the detection and modulation generate circuit could generate pulse singles with various frequencies according to the load varying generated due to distance varying between the portable electronic device and the charged device, and charge to the portable electronic device according the pulse singles so as to reach the goal of effective management the power.

A 4-μA quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications

Abstract: This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm 2 in 0.25-μm CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 μA.

FM/PWM control scheme in class DE inverter

Abstract: This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.

An ultra-low-power digitally-controlled buck converter IC for cellular phone applications

Abstract: This paper describes a dual-mode digitally-controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator based ADC (ring-ADC), which is nearly entirely synthesizable, robust against switching noise, and has flexible resolution control, and a very low power ring oscillator-multiplexer based digital PWM generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies 2 mm/sup 2/ active area in 0.25 /spl mu/m CMOS. Very high efficiencies are achieved over a load range of 0.1 to 400 mA. Measured quiescent current in PFM mode is 4 /spl mu/A.

Concise modulation strategies for four-leg voltage source inverters

Abstract: The continuous, discontinuous pulse-width modulation (PWM) schemes and a novel space vector modulation methodology are proposed in this paper for four-leg dc-ac inverters. Using a space vector definition that includes the zero sequence voltage component and partitioning the feasible sixteen modes into two separate sets - one set having zero sequence voltages with positive magnitudes and the other set with negative magnitudes - the novel space vector implementation technique is determined as also the discontinuous carrier based PWM scheme. For the continuous carrier based PWM scheme, the indeterminate defining output voltage equations expressed in terms of the existence functions of the switching devices are solved using an optimization technique. The modulation schemes determined are shown by experimental results to synthesis any desirable balanced or unbalanced three-phase voltage sets when operating in the linear modulation region.

Methods and circuits for frequency modulation that reduce the spectral noise of switching regulators

Abstract: The present invention comprises methods and circuits for spread spectrum frequency modulation that reduce peak spectral noise at the outputs or inputs of switching regulators. More specifically, the present invention modulates the operating frequency of the switching regulator in accordance with a frequency modulation waveform having a shape coordinated to a peak noise amplitude waveform that describes the correlation between the operating frequency of a switching regulator and the peak noise amplitude at the regulator's input or output absent spread spectrum frequency modulation.

Chirped return-to-zero modulation by imbalanced pulse carver driving signals

Abstract: We demonstrate a simple way of generating chirped and alternate-chirp return-to-zero signals of various duty cycles by means of a sinusoidally driven dual-drive Mach-Zehnder modulator. The amount of inherently bit-synchronized chirp is tuned by varying the imbalance of the drive signals' amplitudes or their relative delay. High temporal resolution measurements of the intensity and phase of the modulated optical field are obtained at 20 and 40 Gb/s using the spectrogram technique.

Method and system for power factor correction using constant pulse proportional current

Abstract: A Power Factor Correction (PFC) system providing near unity power factor for an AC power source (VAC) connected to a complex load. The system includes a bridge rectifier, boost or buck-boost converter, complex load, and pulse width modulation (PWM) controller to provide pulses with variable duty cycle to a power switch. The invention is a constant pulse proportional current (CPPC) PWM controller that generates trains of pulses constant in frequency and duty cycle for one semi-cycle of the VAC. The duty cycle of the driving signal is modified by applying open-loop correction signals to summing nodes of PWM circuits. Since the PWM provides a constant train of driving pulses with constant duty cycle for one semi-cycle of the VAC, the current absorbed by the converter is contingent and linearly proportional to the voltage. Thus, the output current follows the voltage resulting in a power factor of near unity.

Dual-mode PFM boost converter

Abstract: A dual-mode pulse frequency modulation boost converter operates in a hysteretic mode during light load currents to regulate an output voltage using a substantially fixed peak switching current and operates in a continuous mode during heavy load currents to regulate the output voltage using a variable peak switching current. The boost converter senses load power to automatically switch between the hysteretic mode and the continuous mode.

EMI reduction in switched power converters by means of spread spectrum modulation techniques

Abstract: Spread spectrum clock generation techniques (SSCG) were originally developed to reduce EMI in communications and microprocessor systems working in the range of hundreds of MHz. The working principle consists of modulating the original constant clock frequency, in order to spread each single harmonic energy into a certain frequency band, thus reducing amplitudes at each individual frequency. Nowadays, the switching frequency of power converters has been increasing up to values that make feasible the application of such techniques to reduce EMI emissions in power circuits. This paper deals with SSCG applied to reduction of EMI emissions in switched power converters, following certain modulation profiles. It is focussed on studying the effectiveness of EMI reduction as a function of frequency ranges, modulation profiles and other modulation parameters. A buck converter, whose switching frequency can be swept from 100 kHz to 1 MHz, has been used for experimental validation. Conducted disturbances produced by the converter, using different modulation parameters, were measured and compared with those produced by the same converter when driven with the classical constant frequency, variable duty, switching pattern. Significant reductions in conducted EMI may be observed. Optimal modulation profiles and parameters are identified.

Circuit and method for pulse width modulation

Abstract: A circuit and a method for performing pulse width modulation are provided. A pulse density modulator (PDM) is applied to receive the least N bits of the input data and to generate a pulse density modulation signal. The number of pulse of the pulse density modulation signal in 2{circumflex over ( )}N frames correspond to a value of the least N bits of the input data. An adder is applied to generate a PWM data by adding a value of the most M bits of the input data to a value of the pulse density modulation signal generated by the PDM. A pulse width modulator is applied to generate a PWM signal dithering in 2{circumflex over ( )}N frames according to the PWM data generated by the adder, so as to improve the audio quality of pulse width modulation and the Electro-Magnetic Interference (EMI) phenomenon.

Pulse width modulation fan control

Abstract: In one embodiment, a fan control system includes a temperature-sensing device that is adapted to sense a temperature of a component and output a temperature feedback signal, and a pulse width modulation control circuit that is configured to receive the temperature feedback signal output from the temperature-sensing device and a separate fan command signal and, relative to those signals, generate a pulse width modulation signal that is sent to a pulse width modulation controlled fan.

Digital current mode controller with low frequency current sampling

Abstract: The present invention is directed to a digital controller for adjusting the duty ratio a pulse width modulation control signal used to control a power switch of a switch mode power converter. According to various embodiments, the digital controller comprises a voltage compensator module for generating a first signal (Dvoltage) representative of the duty ratio of the control signal based on a difference between an output voltage of the converter and a reference voltage. The controller also includes a current compensator module for generating a second signal (Dcorrection) representative of a modification to the duty ratio of the control signal based on an output current of the converter. A subtraction module subtracts the second signal (Dcorrection) from the first signal (Dvoltage) to thereby generate a third signal (D), which is used by a duty ratio PWM generator module to generate the pulse width modulation control signal with the appropriate duty ratio.

A low-cost digital controller for a switching DC converter with improved voltage regulation

Abstract: A new control algorithm with improved regulation is presented for a switching dc buck converter. The controller is realized with hardware description language (HDL) and can be implemented in any process. The controller uses four decision levels, combines pulse frequency modulation (PFM), pulse width modulation (PWM), and uses dithering for improved regulation. The controller is prototyped on a field programmable gate array (FPGA) and experimental results show good performance over input and load disturbances. Importantly, the controller does not require high resolution analog-to-digital conversion for signal processing, and also does not require fast digital clocking. This controller has significant potential to be widely used in industrial applications where cost and design time are of great concern.

Method and apparatus having a digital PWM signal generator with integral noise shaping

Abstract: A method and apparatus having a digital pulse width modulation generator with integral noise shaping is provided. The apparatus for generating a digital pulse width modulation signal includes a random period signal generator, a noise shaping unit, a duty ratio quantizer, and a PWM counter. The random period signal generator generates a random period signal. The noise shaping unit is responsive to at least a digital signal, the random period signal, and a delayed digital signal for generating a corrected signal. The duty ratio quantizer is responsive to the corrected digital signal, the random period signal, and a quantization clock signal, and generates a first duty ratio signal and a second duty ratio signal. The PWM counter is responsive to the first and second duty ratio signals and a quantization clock signal, and generates positive and negative PWM signals, respectively.

Pulse-domain digital image processing for vision chips employing low-voltage operation in deep-submicrometer technologies

Abstract: A new architecture for pixel-level parallel image processing in the pulse domain for CMOS vision chips has been developed. Image processing such as edge enhancement, edge detection, and blurring are realized based on suppression and promotion of digital pulses; the pixel value is represented by the frequency of digital pulses by use of a pulse-frequency modulation (PFM) photosensor or that with an in-pixel 1-bit analog-to-digital converter. The proposed architecture is suitable for low-voltage operation in deep-submicrometer technologies because the image processing is implemented by 1-bit fully digital circuits with a small number of logic gates. The principles of the image processing are addressed. We have fabricated a 16 /spl times/ 16-pixel prototype vision chip. The relationship between illumination and the output pulse frequency is characterized. Step responses of the prototype vision chip for fundamental image processing operations show good agreement with those expected by correlation-based spatial filtering. A simple image binarization method specific to our architecture is also presented. The histograms of the intervals of the output pulses after image processing show multiple peaks, which indicates that averaging of the intervals is required for longer periods to achieve higher image-processing quality. To improve the linearity of pulse frequency dependence on illumination, usage of random clocks is discussed.

Correction of the distortion in frequency modulation spectroscopy

Abstract: A theoretical expression for the detected signal in frequency modulation spectroscopy with a residual amplitude modulation (RAM) is computed. The line shape distortion induced by the RAM is shown to be essentially suppressed for a proper choice of the modulation and detection parameters. The experimental tests are carried out in saturation spectroscopy of I2 at 514.5 nm. Experimental limitations are analysed.

Switching regulator with improved load transient efficiency and method thereof

Abstract: A switching regulator with improved load transient efficiency comprises an output stage to generate an output voltage, a pulse width modulation circuit to generate a pulse width modulation signal, a constant ON-time circuit to generate an ON-time signal in accordance with the pulse width modulation signal to drive the output stage, and a masking apparatus to mask the ON-time signal by the pulse width modulation signal to thereby drive the output stage during load transient. During load transient, the masking apparatus reduces the switching times of the output stage to thereby reduce the switching loss and thus improve the efficiency of the regulator.

Optical phase and intensity modulation using dark pulses

Abstract: A new optical modulation format is described, based on the simultaneous modulation of the amplitude and the phase of an optical signal. The proposed modulation format offers significant advantages in wavelength-division-multiplexing transmission, offering high spectral efficiency values, high extinction ratio, and requiring electronics with reduced bandwidth.

Method and apparatus to switch operating modes in a PFM converter

Abstract: A dual-mode pulse frequency modulation boost converter operates in a hysteretic mode during light load currents to regulate an output voltage using a substantially fixed peak switching current and operates in a continuous mode during heavy load currents to regulate the output voltage using a variable peak switching current. The boost converter senses load power to automatically switch between the hysteretic mode and the continuous mode.

A 4/spl mu/A-quiescent-current dual-mode buck converter IC for cellular phone applications

Abstract: This digitally-controlled buck converter IC occupies 2 mm2 active area in 0.25mum CMOS, and the quiescent current is 4VA, representing more than a 3-fold improvement over the leading state-of-the-art analog approach. As a result, cellular phone standby time can be extended by up to 3 times

Ultra narrow band modulation

Abstract: Ultra narrow band modulation and ultra wideband modulation have common mathematical roots. The difference is in the baseband pulse width. UWB utilizes extremely short energy pulses, with long periods of no signal between pulses. UNB utilizes a continuous wave signal with individual RF cycles removed, or phase altered, to indicate a digital ONE.

Regulation method for IC engine with common-rail fuel injection system has pulse width modulation signal frequency switched between 2 values dependent on engine speed

Abstract: The regulation method has the pump (3) supplying fuel to the common-rail fuel injection system (6,7) provided with a suction throttle and controlled by a pulse-width modulation signal via an electronic control device (4). A critical speed is calculated from the angular spacing between successive fuel injections and the frequency of the pulse-width modulation signal, used for determination of a rev range, the pulse-width modulation frequency set to a first frequency outside this rev range and a second frequency within this rev range.

Spectral aliasing effects of PWM signals with time-quantized switching instants

Abstract: This paper investigates the problem of the spectrum effects that appear in the power spectrum density (PSD) of a digitally implemented Pulse Width Modulated (PWM) signal. We recognize that as the digital implementation forces the switching instants to be time-quantized, an aliasing effect modifies the properties of the original PWM spectrum. Furthermore, we analyze, through analytical tools and numerical simulation, such effects for two typical cases: a sinusoidal modulating signal and Pulse Amplitude Modulated (PAM) carrying a maximum information modulating signal.